ARM: tegra: apalis_t30: annotate/clean-up pcie controller/port nodes

Annotate PCIe port nodes and clean-up PCIe controller/port status' with
respect to carrier board vs. module level device trees. As port 3
connects to the on-module Gigabit Ethernet MACPHY it is always enabled
together with the PCIe controller itself.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts
index 0dc85a2..e3c70e7 100644 (file)
--- a/arch/arm/boot/dts/tegra30-apalis-eval.dts
+++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts
@@ -23,8 +23,6 @@
        };
 
        pcie@3000 {
-               status = "okay";
-
                pci@1,0 {
                        status = "okay";
                };
@@ -32,10 +30,6 @@
                pci@2,0 {
                        status = "okay";
                };
-
-               pci@3,0 {
-                       status = "okay";
-               };
        };
 
        host1x@50000000 {

diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index fc279a0..c810c04 100644 (file)
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -15,6 +15,7 @@
        };
 
        pcie@3000 {
+               status = "okay";
                avdd-pexa-supply = <&vdd2_reg>;
                avdd-pexb-supply = <&vdd2_reg>;
                avdd-pex-pll-supply = <&vdd2_reg>;
@@ -24,15 +25,19 @@
                vdd-pexa-supply = <&vdd2_reg>;
                vdd-pexb-supply = <&vdd2_reg>;
 
+               /* Apalis type specific */
                pci@1,0 {
                        nvidia,num-lanes = <4>;
                };
 
+               /* Apalis PCIe */
                pci@2,0 {
                        nvidia,num-lanes = <1>;
                };
 
+               /* I210/I211 Gigabit Ethernet Controller (on-module) */
                pci@3,0 {
+                       status = "okay";
                        nvidia,num-lanes = <1>;
                        pcie@0 {
                                reg = <0 0 0 0 0>;