# CHECK-INTERESTINGNESS: V_ADD_U32
# RESULT: undef %{{[0-9]+}}.sub1:vreg_64 = IMPLICIT_DEF
-# RESULT-NEXT: %{{[0-9]+}}.sub0:vreg_64 = IMPLICIT_DEF
+# RESULT-NEXT: undef %{{[0-9]+}}.sub0:vreg_64 = IMPLICIT_DEF
# RESULT-NEXT: %1:vgpr_32 = V_ADD_U32_e32 %{{[0-9]+}}.sub0, %{{[0-9]+}}.sub1, implicit $exec
# RESULT-NEXT: S_ENDPGM 0, implicit %1
bool IsGeneric = MRI->getRegClassOrNull(Reg) == nullptr;
unsigned ImpDef = IsGeneric ? TargetOpcode::G_IMPLICIT_DEF
: TargetOpcode::IMPLICIT_DEF;
+
+ unsigned State = getRegState(MO);
+ if (MO.getSubReg())
+ State |= RegState::Undef;
+
BuildMI(*EntryMBB, EntryInsPt, DebugLoc(), TII->get(ImpDef))
- .addReg(NewReg, getRegState(MO), MO.getSubReg());
+ .addReg(NewReg, State, MO.getSubReg());
}
// Update all uses.