drm/msm/dpu: Add a function to retrieve the current CTL status
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Sat, 11 Sep 2021 16:39:18 +0000 (18:39 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fri, 18 Feb 2022 17:28:08 +0000 (20:28 +0300)
Add a function that returns whether the requested CTL is active or not:
this will be used in a later commit to fix command mode panel issues.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Link: https://lore.kernel.org/r/20210911163919.47173-1-angelogioacchino.delregno@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h

index 02da9ec..3584f5e 100644 (file)
@@ -92,6 +92,11 @@ static inline void dpu_hw_ctl_trigger_start(struct dpu_hw_ctl *ctx)
        DPU_REG_WRITE(&ctx->hw, CTL_START, 0x1);
 }
 
+static inline bool dpu_hw_ctl_is_started(struct dpu_hw_ctl *ctx)
+{
+       return !!(DPU_REG_READ(&ctx->hw, CTL_START) & BIT(0));
+}
+
 static inline void dpu_hw_ctl_trigger_pending(struct dpu_hw_ctl *ctx)
 {
        trace_dpu_hw_ctl_trigger_prepare(ctx->pending_flush_mask,
@@ -587,6 +592,7 @@ static void _setup_ctl_ops(struct dpu_hw_ctl_ops *ops,
        ops->get_pending_flush = dpu_hw_ctl_get_pending_flush;
        ops->get_flush_register = dpu_hw_ctl_get_flush_register;
        ops->trigger_start = dpu_hw_ctl_trigger_start;
+       ops->is_started = dpu_hw_ctl_is_started;
        ops->trigger_pending = dpu_hw_ctl_trigger_pending;
        ops->reset = dpu_hw_ctl_reset_control;
        ops->wait_reset_status = dpu_hw_ctl_wait_reset_status;
index 806c171..ac15444 100644 (file)
@@ -62,6 +62,13 @@ struct dpu_hw_ctl_ops {
        void (*trigger_start)(struct dpu_hw_ctl *ctx);
 
        /**
+        * check if the ctl is started
+        * @ctx       : ctl path ctx pointer
+        * @Return: true if started, false if stopped
+        */
+       bool (*is_started)(struct dpu_hw_ctl *ctx);
+
+       /**
         * kickoff prepare is in progress hw operation for sw
         * controlled interfaces: DSI cmd mode and WB interface
         * are SW controlled