multiclass VRED_MV_V<string opcodestr, bits<6> funct6> {
def _VS : VALUVV<funct6, OPMVV, opcodestr # ".vs">,
- Sched<[WriteVIRedV, ReadVIRedV, ReadVIRedV0, ReadVMask]>;
+ Sched<[WriteVIRedV_From_UpperBound, ReadVIRedV, ReadVIRedV0,
+ ReadVMask]>;
}
multiclass VWRED_IV_V<string opcodestr, bits<6> funct6> {
def _VS : VALUVV<funct6, OPIVV, opcodestr # ".vs">,
- Sched<[WriteVIWRedV, ReadVIWRedV, ReadVIWRedV0, ReadVMask]>;
+ Sched<[WriteVIWRedV_From_UpperBound, ReadVIWRedV, ReadVIWRedV0,
+ ReadVMask]>;
}
multiclass VRED_FV_V<string opcodestr, bits<6> funct6> {
def _VS : VALUVV<funct6, OPFVV, opcodestr # ".vs">,
- Sched<[WriteVFRedV, ReadVFRedV, ReadVFRedV0, ReadVMask]>;
+ Sched<[WriteVFRedV_From_UpperBound, ReadVFRedV, ReadVFRedV0,
+ ReadVMask]>;
}
multiclass VREDO_FV_V<string opcodestr, bits<6> funct6> {
def _VS : VALUVV<funct6, OPFVV, opcodestr # ".vs">,
- Sched<[WriteVFRedOV, ReadVFRedOV, ReadVFRedOV0, ReadVMask]>;
+ Sched<[WriteVFRedOV_From_UpperBound, ReadVFRedOV, ReadVFRedOV0,
+ ReadVMask]>;
}
multiclass VWRED_FV_V<string opcodestr, bits<6> funct6> {
def _VS : VALUVV<funct6, OPFVV, opcodestr # ".vs">,
- Sched<[WriteVFWRedV, ReadVFWRedV, ReadVFWRedV0, ReadVMask]>;
+ Sched<[WriteVFWRedV_From_UpperBound, ReadVFWRedV, ReadVFWRedV0,
+ ReadVMask]>;
}
multiclass VWREDO_FV_V<string opcodestr, bits<6> funct6> {
def _VS : VALUVV<funct6, OPFVV, opcodestr # ".vs">,
- Sched<[WriteVFWRedOV, ReadVFWRedOV, ReadVFWRedOV0, ReadVMask]>;
+ Sched<[WriteVFWRedOV_From_UpperBound, ReadVFWRedOV, ReadVFWRedOV0,
+ ReadVMask]>;
}
multiclass VMALU_MV_Mask<string opcodestr, bits<6> funct6, string vm = "v"> {
multiclass VPseudoVRED_VS {
foreach m = MxList in {
+ defvar mx = m.MX;
+ defvar WriteVIRedV_From_MX = !cast<SchedWrite>("WriteVIRedV_From_" # mx);
defm _VS : VPseudoTernary<V_M1.vrclass, m.vrclass, V_M1.vrclass, m>,
- Sched<[WriteVIRedV, ReadVIRedV, ReadVIRedV, ReadVIRedV, ReadVMask]>;
+ Sched<[WriteVIRedV_From_MX, ReadVIRedV, ReadVIRedV, ReadVIRedV,
+ ReadVMask]>;
}
}
multiclass VPseudoVWRED_VS {
foreach m = MxList in {
+ defvar mx = m.MX;
+ defvar WriteVIWRedV_From_MX = !cast<SchedWrite>("WriteVIWRedV_From_" # mx);
defm _VS : VPseudoTernary<V_M1.vrclass, m.vrclass, V_M1.vrclass, m>,
- Sched<[WriteVIWRedV, ReadVIWRedV, ReadVIWRedV, ReadVIWRedV, ReadVMask]>;
+ Sched<[WriteVIWRedV_From_MX, ReadVIWRedV, ReadVIWRedV,
+ ReadVIWRedV, ReadVMask]>;
}
}
multiclass VPseudoVFRED_VS {
foreach m = MxListF in {
+ defvar mx = m.MX;
+ defvar WriteVFRedV_From_MX = !cast<SchedWrite>("WriteVFRedV_From_" # mx);
defm _VS : VPseudoTernary<V_M1.vrclass, m.vrclass, V_M1.vrclass, m>,
- Sched<[WriteVFRedV, ReadVFRedV, ReadVFRedV, ReadVFRedV, ReadVMask]>;
+ Sched<[WriteVFRedV_From_MX, ReadVFRedV, ReadVFRedV, ReadVFRedV,
+ ReadVMask]>;
}
}
multiclass VPseudoVFREDO_VS {
foreach m = MxListF in {
+ defvar mx = m.MX;
+ defvar WriteVFRedOV_From_MX = !cast<SchedWrite>("WriteVFRedOV_From_" # mx);
defm _VS : VPseudoTernary<V_M1.vrclass, m.vrclass, V_M1.vrclass, m>,
- Sched<[WriteVFRedOV, ReadVFRedOV, ReadVFRedOV, ReadVFRedOV, ReadVMask]>;
+ Sched<[WriteVFRedOV_From_MX, ReadVFRedOV, ReadVFRedOV,
+ ReadVFRedOV, ReadVMask]>;
}
}
multiclass VPseudoVFWRED_VS {
foreach m = MxListF in {
+ defvar mx = m.MX;
+ defvar WriteVFWRedV_From_MX = !cast<SchedWrite>("WriteVFWRedV_From_" # mx);
defm _VS : VPseudoTernary<V_M1.vrclass, m.vrclass, V_M1.vrclass, m>,
- Sched<[WriteVFWRedV, ReadVFWRedV, ReadVFWRedV, ReadVFWRedV, ReadVMask]>;
+ Sched<[WriteVFWRedV_From_MX, ReadVFWRedV, ReadVFWRedV,
+ ReadVFWRedV, ReadVMask]>;
}
}
// Used for widening and narrowing instructions as it doesn't contain M8.
defvar SchedMxListW = ["UpperBound", "MF8", "MF4", "MF2", "M1", "M2", "M4"];
defvar SchedMxListFW = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4"];
+// Used for widening floating-point Reduction as it doesn't contain MF8.
+defvar SchedMxListFWRed = ["UpperBound", "MF4", "MF2", "M1", "M2", "M4", "M8"];
// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxList
multiclass LMULSchedWrites<string name> {
}
}
+// Creates SchedWrite for each (name, LMUL) pair for LMUL in SchedMxListFWRed
+multiclass LMULSchedWritesFWRed<string name> {
+ foreach mx = SchedMxListFWRed in {
+ def name # "_" # mx : SchedWrite;
+ }
+}
+
// Creates SchedRead for each (name, LMUL) pair for LMUL in SchedMxList
multiclass LMULSchedReads<string name> {
foreach mx = SchedMxList in {
}
}
+// Creates WriteRes for each (name, LMUL, resources) tuple for LMUL
+// in SchedMxListFWRed
+multiclass LMULWriteResFWRed<string name, list<ProcResourceKind> resources> {
+ foreach mx = SchedMxListFWRed in {
+ def : WriteRes<!cast<SchedWrite>(name # "_" # mx), resources>;
+ }
+}
+
// Creates ReadAdvance for each (name, LMUL, val) tuple for LMUL
// in SchedMxList
multiclass LMULReadAdvance<string name, int val, list<SchedWrite> writes = []> {
defm "" : LMULSchedWritesFW<"WriteVFNCvtFToFV">;
// 14. Vector Reduction Operations
+// The latency of reduction is determined by the size of the read resource.
+// The LMUL range of read resource(VS2) for reduction operantion is between
+// MF8 and M8. Use the _From suffix to indicate the number of the
+// LMUL from VS2.
// 14.1. Vector Single-Width Integer Reduction Instructions
-def WriteVIRedV : SchedWrite;
+defm "" : LMULSchedWrites<"WriteVIRedV_From">;
// 14.2. Vector Widening Integer Reduction Instructions
-def WriteVIWRedV : SchedWrite;
+defm "" : LMULSchedWrites<"WriteVIWRedV_From">;
// 14.3. Vector Single-Width Floating-Point Reduction Instructions
-def WriteVFRedV : SchedWrite;
-def WriteVFRedOV : SchedWrite;
+defm "" : LMULSchedWrites<"WriteVFRedV_From">;
+defm "" : LMULSchedWrites<"WriteVFRedOV_From">;
// 14.4. Vector Widening Floating-Point Reduction Instructions
-def WriteVFWRedV : SchedWrite;
-def WriteVFWRedOV : SchedWrite;
+defm "" : LMULSchedWritesFWRed<"WriteVFWRedV_From">;
+defm "" : LMULSchedWritesFWRed<"WriteVFWRedOV_From">;
// 15. Vector Mask Instructions
// 15.1. Vector Mask-Register Logical Instructions
defm "" : LMULWriteResFW<"WriteVFNCvtFToFV", []>;
// 14. Vector Reduction Operations
-def : WriteRes<WriteVIRedV, []>;
-def : WriteRes<WriteVIWRedV, []>;
-def : WriteRes<WriteVFRedV, []>;
-def : WriteRes<WriteVFRedOV, []>;
-def : WriteRes<WriteVFWRedV, []>;
-def : WriteRes<WriteVFWRedOV, []>;
+defm "" : LMULWriteRes<"WriteVIRedV_From", []>;
+defm "" : LMULWriteRes<"WriteVIWRedV_From", []>;
+defm "" : LMULWriteRes<"WriteVFRedV_From", []>;
+defm "" : LMULWriteRes<"WriteVFRedOV_From", []>;
+defm "" : LMULWriteResFWRed<"WriteVFWRedV_From", []>;
+defm "" : LMULWriteResFWRed<"WriteVFWRedOV_From", []>;
// 15. Vector Mask Instructions
defm "" : LMULWriteRes<"WriteVMALUV", []>;