BR 993895: Support zero-operand floating-point insn

Support the zero-operand form of floating-point instructions.  Note
that in most cases, the form generated is actually the "popping" form,
e.g. "FADD" becomes "FADDP st0,st1".  This is in accordance with the
Intel documentation.  "FADDP" is also supported.

diff --git a/insns.dat b/insns.dat
index fa04d12..58532aa 100644 (file)
--- a/insns.dat
+++ b/insns.dat
@@ -313,8 +313,10 @@ FADD               fpureg|to               \1\xDC\10\xC0                   8086,FPU
 FADD           fpureg                  \1\xD8\10\xC0                   8086,FPU
 FADD           fpureg,fpu0             \1\xDC\10\xC0                   8086,FPU
 FADD           fpu0,fpureg             \1\xD8\11\xC0                   8086,FPU
+FADD           void                    \2\xDE\xC1                      8086,FPU,ND
 FADDP          fpureg                  \1\xDE\10\xC0                   8086,FPU
 FADDP          fpureg,fpu0             \1\xDE\10\xC0                   8086,FPU
+FADDP          void                    \2\xDE\xC1                      8086,FPU,ND
 FBLD           mem80                   \1\xDF\204                      8086,FPU
 FBLD           mem                     \1\xDF\204                      8086,FPU
 FBSTP          mem80                   \1\xDF\206                      8086,FPU
@@ -323,32 +325,44 @@ FCHS              void                    \2\xD9\xE0                      8086,FPU
 FCLEX          void                    \3\x9B\xDB\xE2                  8086,FPU
 FCMOVB         fpureg                  \1\xDA\10\xC0                   P6,FPU
 FCMOVB         fpu0,fpureg             \1\xDA\11\xC0                   P6,FPU
+FCMOVB         void                    \2\xDA\xC1                      P6,FPU,ND
 FCMOVBE                fpureg                  \1\xDA\10\xD0                   P6,FPU
 FCMOVBE                fpu0,fpureg             \1\xDA\11\xD0                   P6,FPU
+FCMOVBE                void                    \2\xDA\xD1                      P6,FPU,ND
 FCMOVE         fpureg                  \1\xDA\10\xC8                   P6,FPU
 FCMOVE         fpu0,fpureg             \1\xDA\11\xC8                   P6,FPU
+FCMOVE         void                    \2\xDA\xC9                      P6,FPU,ND
 FCMOVNB                fpureg                  \1\xDB\10\xC0                   P6,FPU
 FCMOVNB                fpu0,fpureg             \1\xDB\11\xC0                   P6,FPU
+FCMOVNB                void                    \2\xDB\xC1                      P6,FPU,ND
 FCMOVNBE       fpureg                  \1\xDB\10\xD0                   P6,FPU
 FCMOVNBE       fpu0,fpureg             \1\xDB\11\xD0                   P6,FPU
+FCMOVNBE       void                    \2\xDB\xD1                      P6,FPU,ND
 FCMOVNE                fpureg                  \1\xDB\10\xC8                   P6,FPU
 FCMOVNE                fpu0,fpureg             \1\xDB\11\xC8                   P6,FPU
+FCMOVNE                void                    \2\xDB\xC9                      P6,FPU,ND
 FCMOVNU                fpureg                  \1\xDB\10\xD8                   P6,FPU
 FCMOVNU                fpu0,fpureg             \1\xDB\11\xD8                   P6,FPU
+FCMOVNU                void                    \2\xDB\xD9                      P6,FPU,ND
 FCMOVU         fpureg                  \1\xDA\10\xD8                   P6,FPU
 FCMOVU         fpu0,fpureg             \1\xDA\11\xD8                   P6,FPU
+FCMOVU         void                    \2\xDA\xD9                      P6,FPU,ND
 FCOM           mem32                   \1\xD8\202                      8086,FPU
 FCOM           mem64                   \1\xDC\202                      8086,FPU
 FCOM           fpureg                  \1\xD8\10\xD0                   8086,FPU
 FCOM           fpu0,fpureg             \1\xD8\11\xD0                   8086,FPU
+FCOM           void                    \2\xD8\xD1                      8086,FPU,ND
 FCOMI          fpureg                  \1\xDB\10\xF0                   P6,FPU
 FCOMI          fpu0,fpureg             \1\xDB\11\xF0                   P6,FPU
+FCOMI          void                    \2\xDB\xF1                      P6,FPU,ND
 FCOMIP         fpureg                  \1\xDF\10\xF0                   P6,FPU
 FCOMIP         fpu0,fpureg             \1\xDF\11\xF0                   P6,FPU
+FCOMIP         void                    \2\xDF\xF1                      P6,FPU,ND
 FCOMP          mem32                   \1\xD8\203                      8086,FPU
 FCOMP          mem64                   \1\xDC\203                      8086,FPU
 FCOMP          fpureg                  \1\xD8\10\xD8                   8086,FPU
 FCOMP          fpu0,fpureg             \1\xD8\11\xD8                   8086,FPU
+FCOMP          void                    \2\xD8\xD9                      8086,FPU,ND
 FCOMPP         void                    \2\xDE\xD9                      8086,FPU
 FCOS           void                    \2\xD9\xFF                      386,FPU
 FDECSTP                void                    \2\xD9\xF6                      8086,FPU
@@ -356,23 +370,29 @@ FDISI             void                    \3\x9B\xDB\xE1                  8086,FPU
 FDIV           mem32                   \1\xD8\206                      8086,FPU
 FDIV           mem64                   \1\xDC\206                      8086,FPU
 FDIV           fpureg|to               \1\xDC\10\xF8                   8086,FPU
-FDIV           fpureg,fpu0             \1\xDC\10\xF8                   8086,FPU
 FDIV           fpureg                  \1\xD8\10\xF0                   8086,FPU
+FDIV           fpureg,fpu0             \1\xDC\10\xF8                   8086,FPU
 FDIV           fpu0,fpureg             \1\xD8\11\xF0                   8086,FPU
-FDIVP          fpureg,fpu0             \1\xDE\10\xF8                   8086,FPU
+FDIV           void                    \2\xDE\xF9                      8086,FPU,ND
 FDIVP          fpureg                  \1\xDE\10\xF8                   8086,FPU
+FDIVP          fpureg,fpu0             \1\xDE\10\xF8                   8086,FPU
+FDIVP          void                    \2\xDE\xF9                      8086,FPU,ND
 FDIVR          mem32                   \1\xD8\207                      8086,FPU
 FDIVR          mem64                   \1\xDC\207                      8086,FPU
 FDIVR          fpureg|to               \1\xDC\10\xF0                   8086,FPU
 FDIVR          fpureg,fpu0             \1\xDC\10\xF0                   8086,FPU
 FDIVR          fpureg                  \1\xD8\10\xF8                   8086,FPU
 FDIVR          fpu0,fpureg             \1\xD8\11\xF8                   8086,FPU
+FDIVR          void                    \2\xDE\xF1                      8086,FPU,ND
 FDIVRP         fpureg                  \1\xDE\10\xF0                   8086,FPU
 FDIVRP         fpureg,fpu0             \1\xDE\10\xF0                   8086,FPU
+FDIVRP         void                    \2\xDE\xF1                      8086,FPU,ND
 FEMMS          void                    \2\x0F\x0E                      PENT,3DNOW
 FENI           void                    \3\x9B\xDB\xE0                  8086,FPU
 FFREE          fpureg                  \1\xDD\10\xC0                   8086,FPU
+FFREE          void                    \2\xDD\xC1                      8086,FPU
 FFREEP         fpureg                  \1\xDF\10\xC0                   286,FPU,UNDOC
+FFREEP         void                    \2\xDF\xC1                      286,FPU,UNDOC
 FIADD          mem32                   \1\xDA\200                      8086,FPU
 FIADD          mem16                   \1\xDE\200                      8086,FPU
 FICOM          mem32                   \1\xDA\202                      8086,FPU
@@ -406,6 +426,7 @@ FLD         mem32                   \1\xD9\200                      8086,FPU
 FLD            mem64                   \1\xDD\200                      8086,FPU
 FLD            mem80                   \1\xDB\205                      8086,FPU
 FLD            fpureg                  \1\xD9\10\xC0                   8086,FPU
+FLD            void                    \2\xD9\xC1                      8086,FPU,ND
 FLD1           void                    \2\xD9\xE8                      8086,FPU
 FLDCW          mem                     \1\xD9\205                      8086,FPU,SW
 FLDENV         mem                     \1\xD9\204                      8086,FPU
@@ -421,8 +442,10 @@ FMUL               fpureg|to               \1\xDC\10\xC8                   8086,FPU
 FMUL           fpureg,fpu0             \1\xDC\10\xC8                   8086,FPU
 FMUL           fpureg                  \1\xD8\10\xC8                   8086,FPU
 FMUL           fpu0,fpureg             \1\xD8\11\xC8                   8086,FPU
+FMUL           void                    \2\xDE\xC9                      8086,FPU,ND
 FMULP          fpureg                  \1\xDE\10\xC8                   8086,FPU
 FMULP          fpureg,fpu0             \1\xDE\10\xC8                   8086,FPU
+FMULP          void                    \2\xDE\xC9                      8086,FPU,ND
 FNCLEX         void                    \2\xDB\xE2                      8086,FPU
 FNDISI         void                    \2\xDB\xE1                      8086,FPU
 FNENI          void                    \2\xDB\xE0                      8086,FPU
@@ -448,12 +471,14 @@ FSQRT             void                    \2\xD9\xFA                      8086,FPU
 FST            mem32                   \1\xD9\202                      8086,FPU
 FST            mem64                   \1\xDD\202                      8086,FPU
 FST            fpureg                  \1\xDD\10\xD0                   8086,FPU
+FST            void                    \2\xDD\xD1                      8086,FPU,ND
 FSTCW          mem                     \2\x9B\xD9\207                  8086,FPU,SW
 FSTENV         mem                     \2\x9B\xD9\206                  8086,FPU
 FSTP           mem32                   \1\xD9\203                      8086,FPU
 FSTP           mem64                   \1\xDD\203                      8086,FPU
 FSTP           mem80                   \1\xDB\207                      8086,FPU
 FSTP           fpureg                  \1\xDD\10\xD8                   8086,FPU
+FSTP           void                    \2\xDD\xD9                      8086,FPU,ND
 FSTSW          mem                     \2\x9B\xDD\207                  8086,FPU,SW
 FSTSW          reg_ax                  \3\x9B\xDF\xE0                  286,FPU
 FSUB           mem32                   \1\xD8\204                      8086,FPU
@@ -462,31 +487,39 @@ FSUB              fpureg|to               \1\xDC\10\xE8                   8086,FPU
 FSUB           fpureg,fpu0             \1\xDC\10\xE8                   8086,FPU
 FSUB           fpureg                  \1\xD8\10\xE0                   8086,FPU
 FSUB           fpu0,fpureg             \1\xD8\11\xE0                   8086,FPU
+FSUB           void                    \2\xDE\xE9                      8086,FPU,ND
 FSUBP          fpureg                  \1\xDE\10\xE8                   8086,FPU
 FSUBP          fpureg,fpu0             \1\xDE\10\xE8                   8086,FPU
+FSUBP          void                    \2\xDE\xE9                      8086,FPU,ND
 FSUBR          mem32                   \1\xD8\205                      8086,FPU
 FSUBR          mem64                   \1\xDC\205                      8086,FPU
 FSUBR          fpureg|to               \1\xDC\10\xE0                   8086,FPU
 FSUBR          fpureg,fpu0             \1\xDC\10\xE0                   8086,FPU
 FSUBR          fpureg                  \1\xD8\10\xE8                   8086,FPU
 FSUBR          fpu0,fpureg             \1\xD8\11\xE8                   8086,FPU
+FSUBR          void                    \2\xDE\xE1                      8086,FPU,ND
 FSUBRP         fpureg                  \1\xDE\10\xE0                   8086,FPU
 FSUBRP         fpureg,fpu0             \1\xDE\10\xE0                   8086,FPU
+FSUBRP         void                    \2\xDE\xE1                      8086,FPU,ND
 FTST           void                    \2\xD9\xE4                      8086,FPU
 FUCOM          fpureg                  \1\xDD\10\xE0                   386,FPU
 FUCOM          fpu0,fpureg             \1\xDD\11\xE0                   386,FPU
+FUCOM          void                    \2\xDD\xE1                      386,FPU,ND
 FUCOMI         fpureg                  \1\xDB\10\xE8                   P6,FPU
 FUCOMI         fpu0,fpureg             \1\xDB\11\xE8                   P6,FPU
+FUCOMI         void                    \2\xDB\xE9                      P6,FPU,ND
 FUCOMIP                fpureg                  \1\xDF\10\xE8                   P6,FPU
 FUCOMIP                fpu0,fpureg             \1\xDF\11\xE8                   P6,FPU
+FUCOMIP                void                    \2\xDF\xE9                      P6,FPU,ND
 FUCOMP         fpureg                  \1\xDD\10\xE8                   386,FPU
 FUCOMP         fpu0,fpureg             \1\xDD\11\xE8                   386,FPU
+FUCOMP         void                    \2\xDD\xE9                      386,FPU,ND
 FUCOMPP                void                    \2\xDA\xE9                      386,FPU
 FXAM           void                    \2\xD9\xE5                      8086,FPU
-FXCH           void                    \2\xD9\xC9                      8086,FPU
 FXCH           fpureg                  \1\xD9\10\xC8                   8086,FPU
 FXCH           fpureg,fpu0             \1\xD9\10\xC8                   8086,FPU
 FXCH           fpu0,fpureg             \1\xD9\11\xC8                   8086,FPU
+FXCH           void                    \2\xD9\xC9                      8086,FPU,ND
 FXTRACT                void                    \2\xD9\xF4                      8086,FPU
 FYL2X          void                    \2\xD9\xF1                      8086,FPU
 FYL2XP1                void                    \2\xD9\xF9                      8086,FPU

diff --git a/test/fpu.asm b/test/fpu.asm
new file mode 100644 (file)
index 0000000..66af8d1
--- /dev/null
+++ b/test/fpu.asm
@@ -0,0 +1,125 @@
+; relaxed encodings for FPU instructions, which NASM should support
+; -----------------------------------------------------------------
+
+%define void
+%define reg_fpu0 st0
+%define reg_fpu st1
+
+; no operands instead of one operand:
+
+  ; F(U)COM(P), FCOM2, FCOMP3, FCOMP5
+
+    FCOM            void
+    FCOMP           void
+    FUCOM           void
+    FUCOMP          void
+;    FCOM2           void
+;    FCOMP3          void
+;    FCOMP5          void
+
+  ; FLD, FST, FSTP, FSTP1, FSTP8, FSTP9
+
+    FLD             void
+    FST             void
+    FSTP            void
+;    FSTP1           void
+;    FSTP8           void
+;    FSTP9           void
+
+  ; FXCH, FXCH4, FXCH7, FFREE, FFREEP
+
+    FXCH            void
+;    FXCH4           void
+;    FXCH7           void
+    FFREE           void
+    FFREEP          void
+
+; no operands instead of two operands:
+
+  ; FADD(P), FMUL(P), FSUBR(P), FSUB(P), FDIVR(P), FDIV(P)
+
+    FADD            void
+    FADDP           void
+    FMUL            void
+    FMULP           void
+    FSUBR           void
+    FSUBRP          void
+    FSUB            void
+    FSUBP           void
+    FDIVR           void
+    FDIVRP          void
+    FDIV            void
+    FDIVP           void
+
+; one operand instead of two operands:
+
+  ; FADD, FMUL, FSUB, FSUBR, FDIV, FDIVR
+
+    FADD            reg_fpu
+    FMUL            reg_fpu
+    FSUB            reg_fpu
+    FSUBR           reg_fpu
+    FDIV            reg_fpu
+    FDIVR           reg_fpu
+
+  ; FADD, FMUL, FSUBR, FSUB, FDIVR, FDIV (with TO qualifier)
+
+    FADD            to reg_fpu
+    FMUL            to reg_fpu
+    FSUBR           to reg_fpu
+    FSUB            to reg_fpu
+    FDIVR           to reg_fpu
+    FDIV            to reg_fpu
+
+  ; FADDP, FMULP, FSUBRP, FSUBP, FDIVRP, FDIVP
+
+    FADDP           reg_fpu
+    FMULP           reg_fpu
+    FSUBRP          reg_fpu
+    FSUBP           reg_fpu
+    FDIVRP          reg_fpu
+    FDIVP           reg_fpu
+
+  ; FCMOV(N)B, FCMOV(N)E, FCMOV(N)BE, FCMOV(N)U, and F(U)COMI(P)
+
+    FCMOVB          reg_fpu
+    FCMOVNB         reg_fpu
+    FCMOVE          reg_fpu
+    FCMOVNE         reg_fpu
+    FCMOVBE         reg_fpu
+    FCMOVNBE        reg_fpu
+    FCMOVU          reg_fpu
+    FCMOVNU         reg_fpu
+    FCOMI           reg_fpu
+    FCOMIP          reg_fpu
+    FUCOMI          reg_fpu
+    FUCOMIP         reg_fpu
+
+; two operands instead of one operand:
+
+  ; these don't really exist, and thus are _NOT_ supported:
+
+;   FCOM            reg_fpu,reg_fpu0
+;   FCOM            reg_fpu0,reg_fpu
+;   FUCOM           reg_fpu,reg_fpu0
+;   FUCOM           reg_fpu0,reg_fpu
+;   FCOMP           reg_fpu,reg_fpu0
+;   FCOMP           reg_fpu0,reg_fpu
+;   FUCOMP          reg_fpu,reg_fpu0
+;   FUCOMP          reg_fpu0,reg_fpu
+
+;   FCOM2           reg_fpu,reg_fpu0
+;   FCOM2           reg_fpu0,reg_fpu
+;   FCOMP3          reg_fpu,reg_fpu0
+;   FCOMP3          reg_fpu0,reg_fpu
+;   FCOMP5          reg_fpu,reg_fpu0
+;   FCOMP5          reg_fpu0,reg_fpu
+
+;   FXCH            reg_fpu,reg_fpu0
+;   FXCH            reg_fpu0,reg_fpu
+;   FXCH4           reg_fpu,reg_fpu0
+;   FXCH4           reg_fpu0,reg_fpu
+;   FXCH7           reg_fpu,reg_fpu0
+;   FXCH7           reg_fpu0,reg_fpu
+
+; EOF