dt-bindings: reset: lantiq,reset: Convert to yaml
authorPhilipp Zabel <p.zabel@pengutronix.de>
Thu, 7 Apr 2022 15:43:29 +0000 (17:43 +0200)
committerPhilipp Zabel <p.zabel@pengutronix.de>
Tue, 3 May 2022 15:41:29 +0000 (17:41 +0200)
Convert the device tree bindings for the Lantiq XWAY SoC RCU reset
controller to YAML schema to allow participating in DT validation.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220407154338.4190674-5-p.zabel@pengutronix.de
Documentation/devicetree/bindings/reset/lantiq,reset.txt [deleted file]
Documentation/devicetree/bindings/reset/lantiq,reset.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.txt b/Documentation/devicetree/bindings/reset/lantiq,reset.txt
deleted file mode 100644 (file)
index c6aef36..0000000
+++ /dev/null
@@ -1,30 +0,0 @@
-Lantiq XWAY SoC RCU reset controller binding
-============================================
-
-This binding describes a reset-controller found on the RCU module on Lantiq
-XWAY SoCs.
-
-This node has to be a sub node of the Lantiq RCU block.
-
--------------------------------------------------------------------------------
-Required properties:
-- compatible           : Should be one of
-                               "lantiq,danube-reset"
-                               "lantiq,xrx200-reset"
-- reg                  : Defines the following sets of registers in the parent
-                         syscon device
-                       - Offset of the reset set register
-                       - Offset of the reset status register
-- #reset-cells         : Specifies the number of cells needed to encode the
-                         reset line, should be 2.
-                         The first cell takes the reset set bit and the
-                         second cell takes the status bit.
-
--------------------------------------------------------------------------------
-Example for the reset-controllers on the xRX200 SoCs:
-       reset0: reset-controller@10 {
-               compatible = "lantiq,xrx200-reset";
-               reg <0x10 0x04>, <0x14 0x04>;
-
-               #reset-cells = <2>;
-       };
diff --git a/Documentation/devicetree/bindings/reset/lantiq,reset.yaml b/Documentation/devicetree/bindings/reset/lantiq,reset.yaml
new file mode 100644 (file)
index 0000000..15d65a5
--- /dev/null
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/lantiq,reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq XWAY SoC RCU reset controller
+
+maintainers:
+  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
+
+description: |
+  This binding describes a reset-controller found on the RCU module on Lantiq
+  XWAY SoCs. This node has to be a sub node of the Lantiq RCU block.
+
+properties:
+  compatible:
+    enum:
+      - lantiq,danube-reset
+      - lantiq,xrx200-reset
+
+  reg:
+    description: |
+      Defines the following sets of registers in the parent syscon device
+      Offset of the reset set register
+      Offset of the reset status register
+    maxItems: 2
+
+  '#reset-cells':
+    description: |
+      The first cell takes the reset set bit and the second cell takes the
+      status bit.
+    const: 2
+
+required:
+  - compatible
+  - reg
+  - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    // On the xRX200 SoCs:
+    reset0: reset-controller@10 {
+        compatible = "lantiq,xrx200-reset";
+        reg = <0x10 0x04>, <0x14 0x04>;
+        #reset-cells = <2>;
+    };