u32 reg, mask;
int ret;
- reg = sc->gdscr;
- mask = SW_COLLAPSE_MASK;
+ if (sc->collapse_mask) {
+ reg = sc->collapse_ctrl;
+ mask = sc->collapse_mask;
+ } else {
+ reg = sc->gdscr;
+ mask = SW_COLLAPSE_MASK;
+ }
ret = regmap_update_bits(sc->regmap, reg, mask, val ? mask : 0);
if (ret)
* @pd: generic power domain
* @regmap: regmap for MMIO accesses
* @gdscr: gsdc control register
+ * @collapse_ctrl: APCS collapse-vote register
+ * @collapse_mask: APCS collapse-vote mask
* @gds_hw_ctrl: gds_hw_ctrl register
* @cxcs: offsets of branch registers to toggle mem/periph bits in
* @cxc_count: number of @cxcs
struct generic_pm_domain *parent;
struct regmap *regmap;
unsigned int gdscr;
+ unsigned int collapse_ctrl;
+ unsigned int collapse_mask;
unsigned int gds_hw_ctrl;
unsigned int clamp_io_ctrl;
unsigned int *cxcs;