drm/i915/gt: Disable the ring before resetting HEAD/TAIL
authorChris Wilson <chris@chris-wilson.co.uk>
Tue, 19 Jan 2021 11:08:00 +0000 (11:08 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 19 Jan 2021 11:55:13 +0000 (11:55 +0000)
During the reset of ring submission, we first stop the engine by
clearing the HEAD/TAIL and marking the ring as disabled. However, it
would be safer to disable the ring (after emptying) before resetting the
HEAD/TAIL.

Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210119110802.22228-4-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gt/intel_ring_submission.c

index 4415959..8a5314b 100644 (file)
@@ -301,13 +301,17 @@ static void xcs_sanitize(struct intel_engine_cs *engine)
 
 static bool stop_ring(struct intel_engine_cs *engine)
 {
+       /* Empty the ring by skipping to the end */
        ENGINE_WRITE_FW(engine, RING_HEAD, ENGINE_READ_FW(engine, RING_TAIL));
-
-       ENGINE_WRITE_FW(engine, RING_HEAD, 0);
-       ENGINE_WRITE_FW(engine, RING_TAIL, 0);
+       ENGINE_POSTING_READ(engine, RING_HEAD);
 
        /* The ring must be empty before it is disabled */
        ENGINE_WRITE_FW(engine, RING_CTL, 0);
+       ENGINE_POSTING_READ(engine, RING_CTL);
+
+       /* Then reset the disabled ring */
+       ENGINE_WRITE_FW(engine, RING_HEAD, 0);
+       ENGINE_WRITE_FW(engine, RING_TAIL, 0);
 
        return (ENGINE_READ_FW(engine, RING_HEAD) & HEAD_ADDR) == 0;
 }