mtd: spi-nor: move SECT_4K_PMC special handling
authorMichael Walle <michael@walle.cc>
Mon, 18 Apr 2022 11:26:50 +0000 (13:26 +0200)
committerPratyush Yadav <p.yadav@ti.com>
Mon, 27 Jun 2022 10:12:10 +0000 (15:42 +0530)
The SECT_4K_PMC flag will set a device specific opcode for the 4k sector
erase. Instead of handling it in the core, we can move it to a
late_init(). In that late init, loop over all erase types, look for the
4k size and replace the opcode.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220418112650.2791459-1-michael@walle.cc
drivers/mtd/spi-nor/core.c
drivers/mtd/spi-nor/core.h
drivers/mtd/spi-nor/issi.c

index 502967c76c5f395a9002b83f63af1a5776f6a81f..ce5d69317d46c967d9656e911d0466df4e44fcba 100644 (file)
@@ -2382,12 +2382,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor)
         */
        erase_mask = 0;
        i = 0;
-       if (no_sfdp_flags & SECT_4K_PMC) {
-               erase_mask |= BIT(i);
-               spi_nor_set_erase_type(&map->erase_type[i], 4096u,
-                                      SPINOR_OP_BE_4K_PMC);
-               i++;
-       } else if (no_sfdp_flags & SECT_4K) {
+       if (no_sfdp_flags & SECT_4K) {
                erase_mask |= BIT(i);
                spi_nor_set_erase_type(&map->erase_type[i], 4096u,
                                       SPINOR_OP_BE_4K);
index 3f841ec36e564be0351a1af090e6e538caf963f6..61886868cd022f19d496ccff305dac8d1809a52c 100644 (file)
@@ -457,7 +457,6 @@ struct spi_nor_fixups {
  *                  flags are used together with the SPI_NOR_SKIP_SFDP flag.
  *   SPI_NOR_SKIP_SFDP:       skip parsing of SFDP tables.
  *   SECT_4K:                 SPINOR_OP_BE_4K works uniformly.
- *   SECT_4K_PMC:             SPINOR_OP_BE_4K_PMC works uniformly.
  *   SPI_NOR_DUAL_READ:       flash supports Dual Read.
  *   SPI_NOR_QUAD_READ:       flash supports Quad Read.
  *   SPI_NOR_OCTAL_READ:      flash supports Octal Read.
@@ -505,7 +504,6 @@ struct flash_info {
        u8 no_sfdp_flags;
 #define SPI_NOR_SKIP_SFDP              BIT(0)
 #define SECT_4K                                BIT(1)
-#define SECT_4K_PMC                    BIT(2)
 #define SPI_NOR_DUAL_READ              BIT(3)
 #define SPI_NOR_QUAD_READ              BIT(4)
 #define SPI_NOR_OCTAL_READ             BIT(5)
index c012bc2486e1c26f98c6572e8fde7a9164387b32..3c7d51d2b0509056db805a65af12697040f4dda6 100644 (file)
@@ -29,6 +29,21 @@ static const struct spi_nor_fixups is25lp256_fixups = {
        .post_bfpt = is25lp256_post_bfpt_fixups,
 };
 
+static void pm25lv_nor_late_init(struct spi_nor *nor)
+{
+       struct spi_nor_erase_map *map = &nor->params->erase_map;
+       int i;
+
+       /* The PM25LV series has a different 4k sector erase opcode */
+       for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
+               if (map->erase_type[i].size == 4096)
+                       map->erase_type[i].opcode = SPINOR_OP_BE_4K_PMC;
+}
+
+static const struct spi_nor_fixups pm25lv_nor_fixups = {
+       .late_init = pm25lv_nor_late_init,
+};
+
 static const struct flash_info issi_nor_parts[] = {
        /* ISSI */
        { "is25cd512",  INFO(0x7f9d20, 0, 32 * 1024,   2)
@@ -62,9 +77,13 @@ static const struct flash_info issi_nor_parts[] = {
 
        /* PMC */
        { "pm25lv512",   INFO(0,        0, 32 * 1024,    2)
-               NO_SFDP_FLAGS(SECT_4K_PMC) },
+               NO_SFDP_FLAGS(SECT_4K)
+               .fixups = &pm25lv_nor_fixups
+       },
        { "pm25lv010",   INFO(0,        0, 32 * 1024,    4)
-               NO_SFDP_FLAGS(SECT_4K_PMC) },
+               NO_SFDP_FLAGS(SECT_4K)
+               .fixups = &pm25lv_nor_fixups
+       },
        { "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64)
                NO_SFDP_FLAGS(SECT_4K) },
 };