[MachineOutliner] Add testcase for instruction mapping stats
authorJessica Paquette <jpaquette@apple.com>
Fri, 18 Feb 2022 02:26:16 +0000 (18:26 -0800)
committerJessica Paquette <jpaquette@apple.com>
Fri, 18 Feb 2022 02:26:59 +0000 (18:26 -0800)
I forgot to attach the testcase for 12389e375811d46ce41d949857f8b469d6563114!

llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir [new file with mode: 0644]

diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir b/llvm/test/CodeGen/AArch64/machine-outliner-mapping-stats.mir
new file mode 100644 (file)
index 0000000..7b6ffbe
--- /dev/null
@@ -0,0 +1,29 @@
+# RUN: llc -mtriple=aarch64 -run-pass=machine-outliner -verify-machineinstrs -stats %s -o - 2>&1 | FileCheck %s
+# REQUIRES: asserts
+
+# Check that instruction mapping stats work.
+
+# We ought to map all of the instructions (5 of them) as legal, and then
+# terminate the string with a single illegal character. Debug instructions are
+# always invisible, and don't contribute to the length of the string.
+
+# CHECK: 1 machine-outliner - Number of illegal instrs in unsigned vector
+# CHECK: 1 machine-outliner - Number of invisible instrs in unsigned vector
+# CHECK: 5 machine-outliner - Number of legal instrs in unsigned vector
+# CHECK: 6 machine-outliner - Size of unsigned vector
+
+...
+---
+name:            test
+tracksRegLiveness: true
+machineFunctionInfo:
+  hasRedZone:      false
+body:             |
+  bb.0:
+  liveins: $lr
+    $x0 = ORRXri $xzr, 1
+    $x1 = ORRXri $xzr, 1
+    $x2 = ORRXri $xzr, 1
+    DBG_VALUE $x3, $noreg
+    $x3 = ORRXri $xzr, 1
+    RET undef $lr