scsi: qla2xxx: Fix mailbox Ch erroneous error
authorQuinn Tran <qutran@marvell.com>
Mon, 11 Jan 2021 09:31:32 +0000 (01:31 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 4 Mar 2021 10:37:18 +0000 (11:37 +0100)
commit 044c218b04503858ca4e17f61899c8baa0ae9ba1 upstream.

Mailbox Ch/dump ram extend expects mb register 10 to be set. If not
set/clear, firmware can pick up garbage from previous invocation of this
mailbox. Example: mctp dump can set mb10.  On subsequent flash read which
use mailbox cmd Ch, mb10 can retain previous value.

Link: https://lore.kernel.org/r/20210111093134.1206-6-njavali@marvell.com
Cc: stable@vger.kernel.org
Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com>
Signed-off-by: Quinn Tran <qutran@marvell.com>
Signed-off-by: Nilesh Javali <njavali@marvell.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/scsi/qla2xxx/qla_dbg.c
drivers/scsi/qla2xxx/qla_mbx.c

index bb74319..144a893 100644 (file)
@@ -202,6 +202,7 @@ qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, __be32 *ram,
                wrt_reg_word(&reg->mailbox0, MBC_DUMP_RISC_RAM_EXTENDED);
                wrt_reg_word(&reg->mailbox1, LSW(addr));
                wrt_reg_word(&reg->mailbox8, MSW(addr));
+               wrt_reg_word(&reg->mailbox10, 0);
 
                wrt_reg_word(&reg->mailbox2, MSW(LSD(dump_dma)));
                wrt_reg_word(&reg->mailbox3, LSW(LSD(dump_dma)));
index d6325fb..4ebd885 100644 (file)
@@ -4277,7 +4277,8 @@ qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
        if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
                mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
                mcp->mb[8] = MSW(addr);
-               mcp->out_mb = MBX_8|MBX_0;
+               mcp->mb[10] = 0;
+               mcp->out_mb = MBX_10|MBX_8|MBX_0;
        } else {
                mcp->mb[0] = MBC_DUMP_RISC_RAM;
                mcp->out_mb = MBX_0;