drm/bridge: tc358768: fix THS_ZEROCNT computation

Correct computation of THS_ZEROCNT register.

This register must be set to a value that ensure that
THS_PREPARE + THS_ZERO > 145ns + 10*UI

with the actual value of (THS_PREPARE + THS_ZERO) being

((1 to 2) + 1 + (TCLK_ZEROCNT + 1) + (3 to 4)) x ByteClk cycle +
  + HSByteClk x (2 + (1 to 2)) + (PHY delay)

with PHY delay being about

(8 + (5 to 6)) x MIPIBitClk cycle in the BitClk conversion.

Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 driver")
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Robert Foss <rfoss@kernel.org>
Signed-off-by: Robert Foss <rfoss@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20230427142934.55435-7-francesco@dolcini.it

diff --git a/drivers/gpu/drm/bridge/tc358768.c b/drivers/gpu/drm/bridge/tc358768.c
index 4cb46a3..e3f456b 100644 (file)
--- a/drivers/gpu/drm/bridge/tc358768.c
+++ b/drivers/gpu/drm/bridge/tc358768.c
@@ -761,9 +761,10 @@ static void tc358768_bridge_pre_enable(struct drm_bridge *bridge)
        /* 40ns + 4*UI < THS_PREPARE < 85ns + 6*UI */
        val = 50 + tc358768_to_ns(4 * ui_nsk);
        val = tc358768_ns_to_cnt(val, dsibclk_nsk) - 1;
-       /* THS_ZERO > 145ns + 10*UI */
-       val2 = tc358768_ns_to_cnt(145 - tc358768_to_ns(ui_nsk), dsibclk_nsk);
-       val |= (val2 - tc358768_to_ns(phy_delay_nsk)) << 8;
+       /* THS_PREPARE + THS_ZERO > 145ns + 10*UI */
+       raw_val = tc358768_ns_to_cnt(145 - tc358768_to_ns(3 * ui_nsk), dsibclk_nsk) - 10;
+       val2 = clamp(raw_val, 0, 127);
+       val |= val2 << 8;
        dev_dbg(priv->dev, "THS_HEADERCNT: 0x%x\n", val);
        tc358768_write(priv, TC358768_THS_HEADERCNT, val);