(struct exynos5260_clock_kfc *)samsung_get_base_clock_kfc();
struct exynos5260_clock_mif *clk_mif =
(struct exynos5260_clock_mif *)samsung_get_base_clock_mif();
- unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned long r, m, p, s, mask, fout;
unsigned int pll_ratio = 0;
unsigned int freq;
struct exynos5430_clock_cpif *clk_cpif =
(struct exynos5430_clock_cpif *)
exynos5430_get_base_clock_cpif();
- unsigned long r, m, p, s, k = 0, mask, fout;
+ unsigned long r, m, p, s, mask, fout;
unsigned int pll_ratio = 0;
unsigned int bus_pll_sub_sel = 0;
unsigned int freq;
struct exynos5_clock *clk =
(struct exynos5_clock *)samsung_get_base_clock();
unsigned long pclk, div_aclk_pre, div_aclk;
- unsigned int ratio;
/*
* CLK_DIV_PERIC3
unsigned long uclk, sclk;
unsigned int sel;
unsigned int ratio;
+#ifdef CONFIG_CPU_EXYNOS3250
unsigned int mpll_ratio_pre;
+#endif
/*
* CLK_SRC_PERIL0
unsigned int sel;
unsigned int pre_ratio, ratio;
unsigned long sclk;
+#ifdef CONFIG_CPU_EXYNOS3250
unsigned int mpll_ratio_pre;
+#endif
sel = readl(&clk->src_fsys);
sel = (sel >> (dev_index << 2)) & 0xf;
(struct exynos5_clock *)samsung_get_base_clock();
unsigned int addr;
unsigned int sel;
- unsigned int pre_ratio, ratio;
+ unsigned int ratio;
+#ifndef CONFIG_CPU_EXYNOS5420
+ unsigned int pre_ratio;
+#endif
unsigned long sclk;
sel = readl(&clk->src_fsys);