serial: pch_uart: Add support for reading clock-frequency from DT
authorZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Fri, 12 Aug 2016 11:48:54 +0000 (12:48 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 31 Aug 2016 13:45:19 +0000 (15:45 +0200)
The MIPS based Boston platform provides a 25MHz clock to the UART.

Enable the driver for MIPS and add support in the driver to read
the frequency from device tree.

Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/Kconfig
drivers/tty/serial/pch_uart.c

index 518db24..c783140 100644 (file)
@@ -1380,7 +1380,7 @@ config SERIAL_IFX6X60
 
 config SERIAL_PCH_UART
        tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) UART"
-       depends on PCI && (X86_32 || COMPILE_TEST)
+       depends on PCI && (X86_32 || MIPS ||  COMPILE_TEST)
        select SERIAL_CORE
        help
          This driver is for PCH(Platform controller Hub) UART of Intel EG20T
index ea4ffc2..23672f8 100644 (file)
@@ -31,6 +31,7 @@
 #include <linux/dmi.h>
 #include <linux/nmi.h>
 #include <linux/delay.h>
+#include <linux/of.h>
 
 #include <linux/debugfs.h>
 #include <linux/dmaengine.h>
@@ -1826,6 +1827,10 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
        priv->trigger_level = 1;
        priv->fcr = 0;
 
+       if (pdev->dev.of_node)
+               of_property_read_u32(pdev->dev.of_node, "clock-frequency"
+                                        , &user_uartclk);
+
 #ifdef CONFIG_SERIAL_PCH_UART_CONSOLE
        pch_uart_ports[board->line_no] = priv;
 #endif