ARM64: dts: meson-axg: add RMII pins for ethernet controller
authorYixun Lan <yixun.lan@amlogic.com>
Thu, 11 Jan 2018 03:04:11 +0000 (11:04 +0800)
committerKevin Hilman <khilman@baylibre.com>
Mon, 12 Feb 2018 22:15:10 +0000 (14:15 -0800)
Comparing to RGMII interface, the RMII interface require few pins.
So it's worth describing them here.

Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm64/boot/dts/amlogic/meson-axg.dtsi

index a6b83e8..5b5ef27 100644 (file)
                                        gpio-ranges = <&pinctrl_periphs 0 0 86>;
                                };
 
+                               eth_rmii_x_pins: eth-x-rmii {
+                                       mux {
+                                               groups = "eth_mdio_x",
+                                                      "eth_mdc_x",
+                                                      "eth_rgmii_rx_clk_x",
+                                                      "eth_rx_dv_x",
+                                                      "eth_rxd0_x",
+                                                      "eth_rxd1_x",
+                                                      "eth_txen_x",
+                                                      "eth_txd0_x",
+                                                      "eth_txd1_x";
+                                               function = "eth";
+                                       };
+                               };
+
+                               eth_rmii_y_pins: eth-y-rmii {
+                                       mux {
+                                               groups = "eth_mdio_y",
+                                                      "eth_mdc_y",
+                                                      "eth_rgmii_rx_clk_y",
+                                                      "eth_rx_dv_y",
+                                                      "eth_rxd0_y",
+                                                      "eth_rxd1_y",
+                                                      "eth_txen_y",
+                                                      "eth_txd0_y",
+                                                      "eth_txd1_y";
+                                               function = "eth";
+                                       };
+                               };
+
                                eth_rgmii_x_pins: eth-x-rgmii {
                                        mux {
                                                groups = "eth_mdio_x",