mmc: sdhci: Fix HISPD bit handling for MMC HS 52MHz mode
authorJonas Karlman <jonas@kwiboo.se>
Tue, 18 Apr 2023 16:46:23 +0000 (16:46 +0000)
committerKever Yang <kever.yang@rock-chips.com>
Fri, 21 Apr 2023 07:16:01 +0000 (15:16 +0800)
Set High Speed Enable bit for MMC High Speed (52MHz) mode.

Fixes: f12341a95295 ("mmc: sdhci: Fix HISPD bit handling")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/mmc/sdhci.c

index c6b250b..1389c18 100644 (file)
@@ -682,6 +682,7 @@ static int sdhci_set_ios(struct mmc *mmc)
        if (!no_hispd_bit) {
                if (mmc->selected_mode == MMC_HS ||
                    mmc->selected_mode == SD_HS ||
+                   mmc->selected_mode == MMC_HS_52 ||
                    mmc->selected_mode == MMC_DDR_52 ||
                    mmc->selected_mode == MMC_HS_200 ||
                    mmc->selected_mode == MMC_HS_400 ||