arm: dts: k3-am64-main: Reserve OCMRAM for DMSC-lite and secure proxy communication
authorAswath Govindraju <a-govindraju@ti.com>
Wed, 16 Jun 2021 16:38:21 +0000 (22:08 +0530)
committerLokesh Vutla <lokeshvutla@ti.com>
Thu, 15 Jul 2021 12:26:04 +0000 (17:56 +0530)
The final 128KB in SRAM is reserved by default for DMSC-lite code and
secure proxy communication buffer. The memory region used for DMSC-lite
code can be optionally freed up by secure firmware API[1]. However, the
buffer for secure proxy communication is not configurable. This default
hardware configuration is unique for AM64.

Therefore, indicate the area reserved for DMSC-lite code and secure proxy
communication buffer in the oc_sram device tree node.

[1] - http://downloads.ti.com/tisci/esd/latest/6_topic_user_guides/security_handover.html#triggering-security-handover

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210616163821.20457-3-a-govindraju@ti.com
arch/arm/dts/k3-am64-main.dtsi

index f68b969..c5af2ff 100644 (file)
                tfa-sram@1c0000 {
                        reg = <0x1c0000 0x20000>;
                };
+
+               dmsc-sram@1e0000 {
+                       reg = <0x1e0000 0x1c000>;
+               };
+
+               sproxy-sram@1fc000 {
+                       reg = <0x1fc000 0x4000>;
+               };
        };
 
        gic500: interrupt-controller@1800000 {