dt-bindings: pinctrl: meson: add support for the Meson8m2 SoC
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sun, 22 Apr 2018 10:53:28 +0000 (12:53 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 3 Aug 2018 05:55:24 +0000 (07:55 +0200)
[ Upstream commit 03d9fbc39730b3e6b2e7047dc85f0f70de8fb97d ]

The Meson8m2 SoC is a variant of Meson8 with some updates from Meson8b
(such as the Gigabit capable DesignWare MAC).
It is mostly pin compatible with Meson8, only 10 (existing) CBUS pins
get an additional function (four of these are Ethernet RXD2, RXD3, TXD2
and TXD3 which are required when the board uses an RGMII PHY).
The AOBUS pins seem to be identical on Meson8 and Meson8m2.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

index fe7fe0b03cfb06def2242de87fa37e8f2ed990fb..1b9881786ce963b78dbdaa41b86f5af38d9ea31c 100644 (file)
@@ -3,8 +3,10 @@
 Required properties for the root node:
  - compatible: one of "amlogic,meson8-cbus-pinctrl"
                      "amlogic,meson8b-cbus-pinctrl"
+                     "amlogic,meson8m2-cbus-pinctrl"
                      "amlogic,meson8-aobus-pinctrl"
                      "amlogic,meson8b-aobus-pinctrl"
+                     "amlogic,meson8m2-aobus-pinctrl"
                      "amlogic,meson-gxbb-periphs-pinctrl"
                      "amlogic,meson-gxbb-aobus-pinctrl"
  - reg: address and size of registers controlling irq functionality