unsigned Opc = MI->getOpcode();
switch (Opc) {
case Hexagon::A2_combinew: {
- break; // FIXME
const MachineOperand &DstOp = MI->getOperand(0);
const MachineOperand &HiOp = MI->getOperand(1);
const MachineOperand &LoOp = MI->getOperand(2);
RegisterRef DataFlowGraph::makeRegRef(unsigned Reg, unsigned Sub) const {
assert(TargetRegisterInfo::isPhysicalRegister(Reg));
- assert(Sub == 0 && "Not expecting subregisters");
- // TODO handle subregisters just to see if LMI would work with it.
+ if (Sub != 0)
+ Reg = TRI.getSubReg(Reg, Sub);
return RegisterRef(Reg);
}