ARM: imx: imx8mn-*-evk: use DM settings for PHY configuration
authorHeiko Thiery <heiko.thiery@gmail.com>
Wed, 23 Feb 2022 08:10:29 +0000 (09:10 +0100)
committerStefano Babic <sbabic@denx.de>
Tue, 12 Apr 2022 13:36:17 +0000 (15:36 +0200)
With the correct settings described in the device-tree the PHY settings
in the board init are no longer required. The values are taken from the
linux device tree.

The PHY latency settings are derived from the phy-mode property and the
voltage seetings are done via the regulator.

Suggested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Tested-by: Marek Vasut <marex@denx.de> # 8MNANOD4-EVK
Reviewed-by: Fabio Estevam <festevam@gmail.com>
arch/arm/dts/imx8mn-evk.dtsi
board/freescale/imx8mn_evk/imx8mn_evk.c

index 416fadb..fc2c7f1 100644 (file)
                ethphy0: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <0>;
+                       vddio-supply = <&vddio>;
+
+                       vddio: vddio-regulator {
+                               regulator-min-microvolt = <1800000>;
+                               regulator-max-microvolt = <1800000>;
+                       };
                };
        };
 };
index b24342f..e35d505 100644 (file)
@@ -27,22 +27,6 @@ static void setup_fec(void)
        clrsetbits_le32(&gpr->gpr[1], 0x2000, 0);
 }
 
-int board_phy_config(struct phy_device *phydev)
-{
-       /* enable rgmii rxc skew and phy mode select to RGMII copper */
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x1f);
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x8);
-
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x00);
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x82ee);
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);
-       phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x100);
-
-       if (phydev->drv->config)
-               phydev->drv->config(phydev);
-       return 0;
-}
-
 int board_init(void)
 {
        setup_fec();