r600g: write WAIT_UNTIL in the correct place

This has been wrong all along. Fixing this will allow removing useless
cache flushes.

Cc: 11.1 11.2 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Tested-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 430ffb3..6df1360 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -110,11 +110,22 @@ void r600_flush_emit(struct r600_context *rctx)
                }
        }
 
+       /* Wait packets must be executed first, because SURFACE_SYNC doesn't
+        * wait for shaders if it's not flushing CB or DB.
+        */
        if (rctx->b.flags & R600_CONTEXT_PS_PARTIAL_FLUSH) {
                radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
                radeon_emit(cs, EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4));
        }
 
+       if (wait_until) {
+               /* Use of WAIT_UNTIL is deprecated on Cayman+ */
+               if (rctx->b.family < CHIP_CAYMAN) {
+                       /* wait for things to settle */
+                       radeon_set_config_reg(cs, R_008040_WAIT_UNTIL, wait_until);
+               }
+       }
+
        if (rctx->b.chip_class >= R700 &&
            (rctx->b.flags & R600_CONTEXT_FLUSH_AND_INV_CB_META)) {
                radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
@@ -228,14 +239,6 @@ void r600_flush_emit(struct r600_context *rctx)
                                EVENT_INDEX(0));
        }
 
-       if (wait_until) {
-               /* Use of WAIT_UNTIL is deprecated on Cayman+ */
-               if (rctx->b.family < CHIP_CAYMAN) {
-                       /* wait for things to settle */
-                       radeon_set_config_reg(cs, R_008040_WAIT_UNTIL, wait_until);
-               }
-       }
-
        /* everything is properly flushed */
        rctx->b.flags = 0;
 }