}
}
+ // If the unconditional branch we replaced contains llvm.loop metadata, we
+ // add the metadata to the branch instructions in the predecessors.
+ unsigned LoopMDKind = BB->getContext().getMDKindID("llvm.loop");
+ Instruction *TI = BB->getTerminator();
+ if (TI)
+ if (MDNode *LoopMD = TI->getMetadata(LoopMDKind))
+ for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI) {
+ BasicBlock *Pred = *PI;
+ Pred->getTerminator()->setMetadata(LoopMDKind, LoopMD);
+ }
+
// Everything that jumped to BB now goes to Succ.
BB->replaceAllUsesWith(Succ);
if (!Succ->hasName()) Succ->takeName(BB);
}
// Now that all of the PHI nodes have been inserted and adjusted, modify the
- // backedge blocks to just to the BEBlock instead of the header.
+ // backedge blocks to jump to the BEBlock instead of the header.
+ // If one of the backedges has llvm.loop metadata attached, we remove
+ // it from the backedge and add it to BEBlock.
+ unsigned LoopMDKind = BEBlock->getContext().getMDKindID("llvm.loop");
+ MDNode *LoopMD = nullptr;
for (unsigned i = 0, e = BackedgeBlocks.size(); i != e; ++i) {
TerminatorInst *TI = BackedgeBlocks[i]->getTerminator();
+ if (!LoopMD)
+ LoopMD = TI->getMetadata(LoopMDKind);
+ TI->setMetadata(LoopMDKind, nullptr);
for (unsigned Op = 0, e = TI->getNumSuccessors(); Op != e; ++Op)
if (TI->getSuccessor(Op) == Header)
TI->setSuccessor(Op, BEBlock);
}
+ BEBlock->getTerminator()->setMetadata(LoopMDKind, LoopMD);
//===--- Update all analyses which we must preserve now -----------------===//
--- /dev/null
+; RUN: opt -loop-simplify -S < %s | FileCheck %s
+
+define void @test1(i32 %n) {
+entry:
+ br label %while.cond
+
+while.cond: ; preds = %if.then, %if.else, %entry
+ %count.0 = phi i32 [ 0, %entry ], [ %add, %if.then ], [ %add2, %if.else ]
+ %cmp = icmp ugt i32 %count.0, %n
+ br i1 %cmp, label %while.end, label %while.body
+
+while.body: ; preds = %while.cond
+ %rem = and i32 %count.0, 1
+ %cmp1 = icmp eq i32 %rem, 0
+ br i1 %cmp1, label %if.then, label %if.else
+
+if.then: ; preds = %while.body
+ %add = add i32 %count.0, 1
+ br label %while.cond, !llvm.loop !0
+
+if.else: ; preds = %while.body
+ %add2 = add i32 %count.0, 2
+ br label %while.cond, !llvm.loop !0
+
+while.end: ; preds = %while.cond
+ ret void
+}
+
+; CHECK: if.then
+; CHECK-NOT: br {{.*}}!llvm.loop{{.*}}
+
+; CHECK: while.cond.backedge:
+; CHECK: br label %while.cond, !llvm.loop !0
+
+; CHECK: if.else
+; CHECK-NOT: br {{.*}}!llvm.loop{{.*}}
+
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.distribute.enable", i1 true}
+; CHECK: !0 = distinct !{!0, !1}
+; CHECK: !1 = !{!"llvm.loop.distribute.enable", i1 true}
--- /dev/null
+; RUN: opt -simplifycfg -S < %s | FileCheck %s
+
+define void @test1(i32 %n) #0 {
+entry:
+ %n.addr = alloca i32, align 4
+ %count = alloca i32, align 4
+ store i32 %n, i32* %n.addr, align 4
+ %0 = bitcast i32* %count to i8*
+ store i32 0, i32* %count, align 4
+ br label %while.cond
+
+while.cond: ; preds = %if.end, %entry
+ %1 = load i32, i32* %count, align 4
+ %2 = load i32, i32* %n.addr, align 4
+ %cmp = icmp ule i32 %1, %2
+ br i1 %cmp, label %while.body, label %while.end
+
+while.body: ; preds = %while.cond
+ %3 = load i32, i32* %count, align 4
+ %rem = urem i32 %3, 2
+ %cmp1 = icmp eq i32 %rem, 0
+ br i1 %cmp1, label %if.then, label %if.else
+
+if.then: ; preds = %while.body
+ %4 = load i32, i32* %count, align 4
+ %add = add i32 %4, 1
+ store i32 %add, i32* %count, align 4
+ br label %if.end
+
+; CHECK: if.then:
+; CHECK: br label %while.cond, !llvm.loop !0
+
+if.else: ; preds = %while.body
+ %5 = load i32, i32* %count, align 4
+ %add2 = add i32 %5, 2
+ store i32 %add2, i32* %count, align 4
+ br label %if.end
+
+; CHECK: if.else:
+; CHECK: br label %while.cond, !llvm.loop !0
+
+if.end: ; preds = %if.else, %if.then
+ br label %while.cond, !llvm.loop !0
+
+while.end: ; preds = %while.cond
+ %6 = bitcast i32* %count to i8*
+ ret void
+}
+
+!0 = distinct !{!0, !1}
+!1 = !{!"llvm.loop.distribute.enable", i1 true}
+; CHECK: !0 = distinct !{!0, !1}
+; CHECK: !1 = !{!"llvm.loop.distribute.enable", i1 true}