r600g,radeonsi: implement GL_AMD_pinned_memory
authorMarek Olšák <marek.olsak@amd.com>
Tue, 10 Feb 2015 15:02:54 +0000 (16:02 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Tue, 17 Feb 2015 16:31:48 +0000 (17:31 +0100)
v2: update release notes

Reviewed-by: Christian König <christian.koenig@amd.com>
docs/relnotes/10.6.0.html
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/radeon/r600_buffer_common.c
src/gallium/drivers/radeon/r600_pipe_common.c
src/gallium/drivers/radeon/r600_pipe_common.h
src/gallium/drivers/radeonsi/si_pipe.c

index 10e926a..18e1810 100644 (file)
@@ -43,7 +43,9 @@ TBD.
 Note: some of the new features are only available with certain drivers.
 </p>
 
-TBD.
+<ul>
+<li>GL_AMD_pinned_memory on r600, radeonsi</li>
+</ul>
 
 <h2>Bug fixes</h2>
 
index 60bed0e..a4b7b66 100644 (file)
@@ -270,6 +270,9 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_POLYGON_OFFSET_CLAMP:
                return 1;
 
+       case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
+               return !R600_BIG_ENDIAN && rscreen->b.info.has_userptr;
+
        case PIPE_CAP_COMPUTE:
                return rscreen->b.chip_class > R700;
 
index ebe8067..fc5f6c2 100644 (file)
@@ -385,11 +385,10 @@ static const struct u_resource_vtbl r600_buffer_vtbl =
        NULL                            /* transfer_inline_write */
 };
 
-struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
-                                        const struct pipe_resource *templ,
-                                        unsigned alignment)
+static struct r600_resource *
+r600_alloc_buffer_struct(struct pipe_screen *screen,
+                        const struct pipe_resource *templ)
 {
-       struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
        struct r600_resource *rbuffer;
 
        rbuffer = MALLOC_STRUCT(r600_resource);
@@ -399,7 +398,17 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
        rbuffer->b.b.screen = screen;
        rbuffer->b.vtbl = &r600_buffer_vtbl;
        rbuffer->buf = NULL;
+       rbuffer->TC_L2_dirty = false;
        util_range_init(&rbuffer->valid_buffer_range);
+       return rbuffer;
+}
+
+struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
+                                        const struct pipe_resource *templ,
+                                        unsigned alignment)
+{
+       struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
+       struct r600_resource *rbuffer = r600_alloc_buffer_struct(screen, templ);
 
        if (!r600_init_resource(rscreen, rbuffer, templ->width0, alignment, TRUE)) {
                FREE(rbuffer);
@@ -407,3 +416,33 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
        }
        return &rbuffer->b.b;
 }
+
+struct pipe_resource *
+r600_buffer_from_user_memory(struct pipe_screen *screen,
+                            const struct pipe_resource *templ,
+                            void *user_memory)
+{
+       struct r600_common_screen *rscreen = (struct r600_common_screen*)screen;
+       struct radeon_winsys *ws = rscreen->ws;
+       struct r600_resource *rbuffer = r600_alloc_buffer_struct(screen, templ);
+
+       rbuffer->domains = RADEON_DOMAIN_GTT;
+       util_range_add(&rbuffer->valid_buffer_range, 0, templ->width0);
+
+       /* Convert a user pointer to a buffer. */
+       rbuffer->buf = ws->buffer_from_ptr(ws, user_memory, templ->width0);
+       if (!rbuffer->buf) {
+               FREE(rbuffer);
+               return NULL;
+       }
+
+       rbuffer->cs_buf = ws->buffer_get_cs_handle(rbuffer->buf);
+
+       if (rscreen->info.r600_virtual_address)
+               rbuffer->gpu_address =
+                       ws->buffer_get_virtual_address(rbuffer->cs_buf);
+       else
+               rbuffer->gpu_address = 0;
+
+       return &rbuffer->b.b;
+}
index ee4cda7..dabe53c 100644 (file)
@@ -833,6 +833,7 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
        rscreen->b.fence_reference = r600_fence_reference;
        rscreen->b.fence_signalled = r600_fence_signalled;
        rscreen->b.resource_destroy = u_resource_destroy_vtbl;
+       rscreen->b.resource_from_user_memory = r600_buffer_from_user_memory;
 
        if (rscreen->info.has_uvd) {
                rscreen->b.get_video_param = rvid_get_video_param;
index 46a6bf3..a5c7bd3 100644 (file)
@@ -445,6 +445,10 @@ bool r600_init_resource(struct r600_common_screen *rscreen,
 struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
                                         const struct pipe_resource *templ,
                                         unsigned alignment);
+struct pipe_resource *
+r600_buffer_from_user_memory(struct pipe_screen *screen,
+                            const struct pipe_resource *templ,
+                            void *user_memory);
 
 /* r600_common_pipe.c */
 void r600_draw_rectangle(struct blitter_context *blitter,
index 26182c2..ec53331 100644 (file)
@@ -232,6 +232,9 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
                return 1;
 
+       case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
+               return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
+
        case PIPE_CAP_TEXTURE_MULTISAMPLE:
                /* 2D tiling on CIK is supported since DRM 2.35.0 */
                return sscreen->b.chip_class < CIK ||