amd: add support for Arcturus
authorMarek Olšák <marek.olsak@amd.com>
Mon, 22 Jul 2019 19:11:37 +0000 (15:11 -0400)
committerMarek Olšák <marek.olsak@amd.com>
Mon, 29 Jul 2019 21:52:54 +0000 (17:52 -0400)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
include/pci_ids/radeonsi_pci_ids.h
src/amd/addrlib/src/amdgpu_asic_addr.h
src/amd/common/ac_llvm_util.c
src/amd/common/amd_family.h

index 6c78789..9306fcc 100644 (file)
@@ -254,6 +254,10 @@ CHIPSET(0x66AF, VEGA20)
 CHIPSET(0x15DD, RAVEN)
 CHIPSET(0x15D8, RAVEN)
 
+CHIPSET(0x738C, ARCTURUS)
+CHIPSET(0x7388, ARCTURUS)
+CHIPSET(0x738E, ARCTURUS)
+
 CHIPSET(0x7310, NAVI10)
 CHIPSET(0x7312, NAVI10)
 CHIPSET(0x7318, NAVI10)
index f02d367..75c0679 100644 (file)
@@ -94,6 +94,8 @@
 #define AMDGPU_RAVEN_RANGE      0x01, 0x81
 #define AMDGPU_RAVEN2_RANGE     0x81, 0xFF
 
+#define AMDGPU_ARCTURUS_RANGE   0x32, 0xFF
+
 #define AMDGPU_NAVI10_RANGE     0x01, 0x0A
 #define AMDGPU_NAVI12_RANGE     0x0A, 0x14
 #define AMDGPU_NAVI14_RANGE     0x14, 0x28
 #define ASICREV_IS_RAVEN(r)            ASICREV_IS(r, RAVEN)
 #define ASICREV_IS_RAVEN2(r)           ASICREV_IS(r, RAVEN2)
 
+#define ASICREV_IS_ARCTURUS(r)         ASICREV_IS(r, ARCTURUS)
+
 #define ASICREV_IS_NAVI10_P(r)         ASICREV_IS(r, NAVI10)
 #define ASICREV_IS_NAVI12(r)           ASICREV_IS(r, NAVI12)
 #define ASICREV_IS_NAVI14(r)           ASICREV_IS(r, NAVI14)
index e4a353a..b43224b 100644 (file)
@@ -133,6 +133,8 @@ const char *ac_get_llvm_processor_name(enum radeon_family family)
                return "gfx906";
        case CHIP_RAVEN2:
                return HAVE_LLVM >= 0x0800 ? "gfx909" : "gfx902";
+       case CHIP_ARCTURUS:
+               return "gfx908";
        case CHIP_NAVI10:
                return "gfx1010";
        case CHIP_NAVI12:
index 7914f36..1d6578c 100644 (file)
@@ -97,6 +97,7 @@ enum radeon_family {
     CHIP_VEGA20,
     CHIP_RAVEN,
     CHIP_RAVEN2,
+    CHIP_ARCTURUS,
     CHIP_NAVI10,
     CHIP_NAVI12,
     CHIP_NAVI14,