riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees
authorSamuel Holland <samuel@sholland.org>
Thu, 26 Jan 2023 04:57:34 +0000 (22:57 -0600)
committerJernej Skrabec <jernej.skrabec@gmail.com>
Fri, 27 Jan 2023 22:01:32 +0000 (23:01 +0100)
Sipeed manufactures a "Lichee RV" system-on-module, which provides a
minimal working system on its own, as well as a few carrier boards. The
"Dock" board provides audio, USB, and WiFi. The "86 Panel" additionally
provides 100M Ethernet and a built-in display panel.

The 86 Panel repurposes the USB ID and VBUS detection GPIOs for its RGB
panel interface, since the USB OTG port is inaccessible inside the case.

Co-developed-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230126045738.47903-8-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
arch/riscv/boot/dts/allwinner/Makefile
arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts [new file with mode: 0644]
arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts [new file with mode: 0644]
arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi [new file with mode: 0644]
arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts [new file with mode: 0644]
arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts [new file with mode: 0644]

index 277e59d..f1c70b9 100644 (file)
@@ -1,3 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-480p.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-86-panel-720p.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv-dock.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-lichee-rv.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1-nezha.dtb
 dtb-$(CONFIG_ARCH_SUNXI) += sun20i-d1s-mangopi-mq.dtb
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts
new file mode 100644 (file)
index 0000000..4df8ffb
--- /dev/null
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
+
+#include "sun20i-d1-lichee-rv-86-panel.dtsi"
+
+/ {
+       model = "Sipeed Lichee RV 86 Panel (480p)";
+       compatible = "sipeed,lichee-rv-86-panel-480p", "sipeed,lichee-rv",
+                    "allwinner,sun20i-d1";
+};
+
+&i2c2 {
+       pinctrl-0 = <&i2c2_pb0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       touchscreen@48 {
+               compatible = "focaltech,ft6236";
+               reg = <0x48>;
+               interrupt-parent = <&pio>;
+               interrupts = <6 14 IRQ_TYPE_LEVEL_LOW>; /* PG14 */
+               iovcc-supply = <&reg_vcc_3v3>;
+               reset-gpios = <&pio 6 15 GPIO_ACTIVE_LOW>; /* PG15 */
+               touchscreen-size-x = <480>;
+               touchscreen-size-y = <480>;
+               vcc-supply = <&reg_vcc_3v3>;
+               wakeup-source;
+       };
+};
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts
new file mode 100644 (file)
index 0000000..1874fc0
--- /dev/null
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
+
+#include "sun20i-d1-lichee-rv-86-panel.dtsi"
+
+/ {
+       model = "Sipeed Lichee RV 86 Panel (720p)";
+       compatible = "sipeed,lichee-rv-86-panel-720p", "sipeed,lichee-rv",
+                    "allwinner,sun20i-d1";
+};
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi
new file mode 100644 (file)
index 0000000..6cc7dd0
--- /dev/null
@@ -0,0 +1,119 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
+
+#include "sun20i-d1-lichee-rv.dts"
+
+/ {
+       aliases {
+               ethernet0 = &emac;
+               ethernet1 = &xr829;
+       };
+
+       dmic_codec: dmic-codec {
+               compatible = "dmic-codec";
+               num-channels = <2>;
+               #sound-dai-cells = <0>;
+       };
+
+       dmic-sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "DMIC";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               simple-audio-card,dai-link@0 {
+                       reg = <0>;
+                       format = "pdm";
+                       frame-master = <&link0_cpu>;
+                       bitclock-master = <&link0_cpu>;
+
+                       link0_cpu: cpu {
+                               sound-dai = <&dmic>;
+                       };
+
+                       link0_codec: codec {
+                               sound-dai = <&dmic_codec>;
+                       };
+               };
+       };
+
+       /* PC1 is repurposed as BT_WAKE_AP */
+       /delete-node/ leds;
+
+       wifi_pwrseq: wifi-pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               clocks = <&ccu CLK_FANOUT1>;
+               clock-names = "ext_clock";
+               reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
+               assigned-clocks = <&ccu CLK_FANOUT1>;
+               assigned-clock-rates = <32768>;
+               pinctrl-0 = <&clk_pg11_pin>;
+               pinctrl-names = "default";
+       };
+};
+
+&dmic {
+       pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&emac {
+       pinctrl-0 = <&rmii_pe_pins>;
+       pinctrl-names = "default";
+       phy-handle = <&ext_rmii_phy>;
+       phy-mode = "rmii";
+       phy-supply = <&reg_vcc_3v3>;
+       status = "okay";
+};
+
+&mdio {
+       ext_rmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+               reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */
+       };
+};
+
+&mmc1 {
+       bus-width = <4>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       non-removable;
+       vmmc-supply = <&reg_vcc_3v3>;
+       vqmmc-supply = <&reg_vcc_3v3>;
+       pinctrl-0 = <&mmc1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       xr829: wifi@1 {
+               reg = <1>;
+       };
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&uart1 {
+       uart-has-rtscts;
+       pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       /* XR829 bluetooth is connected here */
+};
+
+&usb_otg {
+       status = "disabled";
+};
+
+&usbphy {
+       /* PD20 and PD21 are repurposed for the LCD panel */
+       /delete-property/ usb0_id_det-gpios;
+       /delete-property/ usb0_vbus_det-gpios;
+       usb1_vbus-supply = <&reg_vcc>;
+};
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts
new file mode 100644 (file)
index 0000000..52b91e1
--- /dev/null
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
+
+#include <dt-bindings/input/input.h>
+
+#include "sun20i-d1-lichee-rv.dts"
+
+/ {
+       model = "Sipeed Lichee RV Dock";
+       compatible = "sipeed,lichee-rv-dock", "sipeed,lichee-rv",
+                    "allwinner,sun20i-d1";
+
+       aliases {
+               ethernet1 = &rtl8723ds;
+       };
+
+       dmic_codec: dmic-codec {
+               compatible = "dmic-codec";
+               num-channels = <2>;
+               #sound-dai-cells = <0>;
+       };
+
+       dmic-sound {
+               compatible = "simple-audio-card";
+               simple-audio-card,name = "DMIC";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               simple-audio-card,dai-link@0 {
+                       reg = <0>;
+                       format = "pdm";
+                       frame-master = <&link0_cpu>;
+                       bitclock-master = <&link0_cpu>;
+
+                       link0_cpu: cpu {
+                               sound-dai = <&dmic>;
+                       };
+
+                       link0_codec: codec {
+                               sound-dai = <&dmic_codec>;
+                       };
+               };
+       };
+
+       wifi_pwrseq: wifi-pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&pio 6 12 GPIO_ACTIVE_LOW>; /* PG12 */
+       };
+};
+
+&dmic {
+       pinctrl-0 = <&dmic_pb11_d0_pin>, <&dmic_pe17_clk_pin>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&mmc1 {
+       bus-width = <4>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       non-removable;
+       vmmc-supply = <&reg_vcc_3v3>;
+       vqmmc-supply = <&reg_vcc_3v3>;
+       pinctrl-0 = <&mmc1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       rtl8723ds: wifi@1 {
+               reg = <1>;
+       };
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&uart1 {
+       uart-has-rtscts;
+       pinctrl-0 = <&uart1_pg6_pins>, <&uart1_pg8_rts_cts_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+
+       bluetooth {
+               compatible = "realtek,rtl8723ds-bt";
+               device-wake-gpios = <&pio 6 15 GPIO_ACTIVE_HIGH>; /* PG16 */
+               enable-gpios = <&pio 6 18 GPIO_ACTIVE_HIGH>; /* PG18 */
+               host-wake-gpios = <&pio 6 17 GPIO_ACTIVE_HIGH>; /* PG17 */
+       };
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_vcc>;
+};
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts b/arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts
new file mode 100644 (file)
index 0000000..d60a056
--- /dev/null
@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+// Copyright (C) 2022 Jisheng Zhang <jszhang@kernel.org>
+// Copyright (C) 2022 Samuel Holland <samuel@sholland.org>
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/dts-v1/;
+
+#include "sun20i-d1.dtsi"
+#include "sun20i-common-regulators.dtsi"
+
+/ {
+       model = "Sipeed Lichee RV";
+       compatible = "sipeed,lichee-rv", "allwinner,sun20i-d1";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       color = <LED_COLOR_ID_GREEN>;
+                       function = LED_FUNCTION_STATUS;
+                       gpios = <&pio 2 1 GPIO_ACTIVE_HIGH>; /* PC1 */
+               };
+       };
+
+       reg_vdd_cpu: vdd-cpu {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd-cpu";
+               regulator-min-microvolt = <900000>;
+               regulator-max-microvolt = <900000>;
+               vin-supply = <&reg_vcc>;
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpu>;
+};
+
+&dcxo {
+       clock-frequency = <24000000>;
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&mmc0 {
+       broken-cd;
+       bus-width = <4>;
+       disable-wp;
+       vmmc-supply = <&reg_vcc_3v3>;
+       vqmmc-supply = <&reg_vcc_3v3>;
+       pinctrl-0 = <&mmc0_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-0 = <&uart0_pb8_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&usbphy {
+       usb0_id_det-gpios = <&pio 3 21 GPIO_ACTIVE_HIGH>; /* PD21 */
+       usb0_vbus_det-gpios = <&pio 3 20 GPIO_ACTIVE_HIGH>; /* PD20 */
+       usb0_vbus-supply = <&reg_vcc>;
+       status = "okay";
+};