KVM: selftests: Introduce x2APIC register manipulation functions
authorJim Mattson <jmattson@google.com>
Fri, 4 Jun 2021 17:26:09 +0000 (10:26 -0700)
committerPaolo Bonzini <pbonzini@redhat.com>
Thu, 17 Jun 2021 17:09:32 +0000 (13:09 -0400)
Standardize reads and writes of the x2APIC MSRs.

Signed-off-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Oliver Upton <oupton@google.com>
Message-Id: <20210604172611.281819-11-jmattson@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
tools/testing/selftests/kvm/include/x86_64/apic.h
tools/testing/selftests/kvm/lib/x86_64/apic.c
tools/testing/selftests/kvm/x86_64/smm_test.c

index e5a9fe0..0be4757 100644 (file)
@@ -78,4 +78,14 @@ static inline void xapic_write_reg(unsigned int reg, uint32_t val)
        ((volatile uint32_t *)APIC_DEFAULT_GPA)[reg >> 2] = val;
 }
 
+static inline uint64_t x2apic_read_reg(unsigned int reg)
+{
+       return rdmsr(APIC_BASE_MSR + (reg >> 4));
+}
+
+static inline void x2apic_write_reg(unsigned int reg, uint64_t value)
+{
+       wrmsr(APIC_BASE_MSR + (reg >> 4), value);
+}
+
 #endif /* SELFTEST_KVM_APIC_H */
index 31f318a..7168e25 100644 (file)
@@ -38,9 +38,8 @@ void xapic_enable(void)
 
 void x2apic_enable(void)
 {
-       uint32_t spiv_reg = APIC_BASE_MSR + (APIC_SPIV >> 4);
-
        wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) |
              MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD);
-       wrmsr(spiv_reg, rdmsr(spiv_reg) | APIC_SPIV_APIC_ENABLED);
+       x2apic_write_reg(APIC_SPIV,
+                        x2apic_read_reg(APIC_SPIV) | APIC_SPIV_APIC_ENABLED);
 }
index 613c42c..c1f8318 100644 (file)
@@ -55,8 +55,8 @@ static inline void sync_with_host(uint64_t phase)
 
 void self_smi(void)
 {
-       wrmsr(APIC_BASE_MSR + (APIC_ICR >> 4),
-             APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_SMI);
+       x2apic_write_reg(APIC_ICR,
+                        APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_SMI);
 }
 
 void guest_code(void *arg)