drm/amd: Show both power attributes for vega20
authorMario Limonciello <mario.limonciello@amd.com>
Thu, 10 Aug 2023 10:32:00 +0000 (05:32 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Aug 2023 22:08:29 +0000 (18:08 -0400)
Vega20 can offer average power in some versions of the PMFW and current
power in others.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega20_hwmgr.c

index b6dd7f8..ad40395 100644 (file)
@@ -2129,7 +2129,7 @@ static int vega20_get_metrics_table(struct pp_hwmgr *hwmgr,
        return ret;
 }
 
-static int vega20_get_gpu_power(struct pp_hwmgr *hwmgr,
+static int vega20_get_gpu_power(struct pp_hwmgr *hwmgr, int idx,
                uint32_t *query)
 {
        int ret = 0;
@@ -2140,10 +2140,17 @@ static int vega20_get_gpu_power(struct pp_hwmgr *hwmgr,
                return ret;
 
        /* For the 40.46 release, they changed the value name */
-       if (hwmgr->smu_version == 0x282e00)
-               *query = metrics_table.AverageSocketPower << 8;
-       else
+       switch (idx) {
+       case AMDGPU_PP_SENSOR_GPU_POWER:
+               if (hwmgr->smu_version == 0x282e00)
+                       *query = metrics_table.AverageSocketPower << 8;
+               else
+                       ret = -EOPNOTSUPP;
+               break;
+       case AMDGPU_PP_SENSOR_GPU_INPUT_POWER:
                *query = metrics_table.CurrSocketPower << 8;
+               break;
+       }
 
        return ret;
 }
@@ -2253,9 +2260,10 @@ static int vega20_read_sensor(struct pp_hwmgr *hwmgr, int idx,
                *((uint32_t *)value) = data->vce_power_gated ? 0 : 1;
                *size = 4;
                break;
+       case AMDGPU_PP_SENSOR_GPU_POWER:
        case AMDGPU_PP_SENSOR_GPU_INPUT_POWER:
                *size = 16;
-               ret = vega20_get_gpu_power(hwmgr, (uint32_t *)value);
+               ret = vega20_get_gpu_power(hwmgr, idx, (uint32_t *)value);
                break;
        case AMDGPU_PP_SENSOR_VDDGFX:
                val_vid = (RREG32_SOC15(SMUIO, 0, mmSMUSVI0_TEL_PLANE0) &