Android is adding RISC-V support to AOSP, but only for 64-bit RISC-V.
(We've only added the 32-bit constants for completeness, should others
want them.)
Signed-off-by: Mao Han <han_mao@linux.alibaba.com>
Components: Framework, Vulkan, AOSP
Google bug:
262585507
Change-Id: Ib818315bb3aa0fe6ebcf82fac846be9a60198e04
case DE_CPU_ARM_64: return "DE_CPU_ARM_64";
case DE_CPU_MIPS: return "DE_CPU_MIPS";
case DE_CPU_MIPS_64: return "DE_CPU_MIPS_64";
+ case DE_CPU_RISCV_32: return "DE_CPU_RISCV_32";
+ case DE_CPU_RISCV_64: return "DE_CPU_RISCV_64";
default:
return de::toString(cpu);
}
DE_STATIC_ASSERT(DE_PTR_SIZE == sizeof(void*));
/* Sanity checks for DE_PTR_SIZE & DE_CPU */
-#if !((DE_CPU == DE_CPU_X86_64 || DE_CPU == DE_CPU_ARM_64 || DE_CPU == DE_CPU_MIPS_64) && (DE_PTR_SIZE == 8)) && \
- !((DE_CPU == DE_CPU_X86 || DE_CPU == DE_CPU_ARM || DE_CPU == DE_CPU_MIPS) && (DE_PTR_SIZE == 4))
+#if !((DE_CPU == DE_CPU_X86_64 || DE_CPU == DE_CPU_ARM_64 || DE_CPU == DE_CPU_MIPS_64 || DE_CPU == DE_CPU_RISCV_64) && (DE_PTR_SIZE == 8)) && \
+ !((DE_CPU == DE_CPU_X86 || DE_CPU == DE_CPU_ARM || DE_CPU == DE_CPU_MIPS || DE_CPU == DE_CPU_RISCV_32) && (DE_PTR_SIZE == 4))
# error "DE_CPU and DE_PTR_SIZE mismatch"
#endif
#define DE_CPU_ARM_64 4
#define DE_CPU_MIPS 5
#define DE_CPU_MIPS_64 6
+#define DE_CPU_RISCV_32 7
+#define DE_CPU_RISCV_64 8
/* CPU detection. */
#if defined(DE_CPU)
# define DE_CPU DE_CPU_MIPS
#elif defined(__mips__) && ((__mips) == 64)
# define DE_CPU DE_CPU_MIPS_64
+#elif defined(__riscv) && ((__riscv_xlen) == 32)
+# define DE_CPU DE_CPU_RISCV_32
+#elif defined(__riscv) && ((__riscv_xlen) == 64)
+# define DE_CPU DE_CPU_RISCV_64
#else
# error Unknown CPU.
#endif
case DE_CPU_ARM_64: return "DE_CPU_ARM_64";
case DE_CPU_MIPS: return "DE_CPU_MIPS";
case DE_CPU_MIPS_64: return "DE_CPU_MIPS_64";
+ case DE_CPU_RISCV_32: return "DE_CPU_RISCV_32";
+ case DE_CPU_RISCV_64: return "DE_CPU_RISCV_64";
default:
return DE_NULL;
}