#include <sbi/sbi_emulate_csr.h>
#include <sbi/sbi_error.h>
#include <sbi/sbi_illegal_insn.h>
+#include <sbi/sbi_pmu.h>
#include <sbi/sbi_trap.h>
#include <sbi/sbi_unpriv.h>
* instruction trap.
*/
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ILLEGAL_INSN);
if (unlikely((insn & 3) != 3)) {
insn = sbi_get_insn(regs->mepc, &uptrap);
if (uptrap.cause) {
#include <sbi/sbi_init.h>
#include <sbi/sbi_ipi.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi/sbi_string.h>
+#include <sbi/sbi_tlb.h>
struct sbi_ipi_data {
unsigned long ipi_type;
if (ipi_dev && ipi_dev->ipi_send)
ipi_dev->ipi_send(remote_hartid);
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
+
if (ipi_ops->sync)
ipi_ops->sync(scratch);
sbi_scratch_offset_ptr(scratch, ipi_data_off);
u32 hartid = current_hartid();
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
if (ipi_dev && ipi_dev->ipi_clear)
ipi_dev->ipi_clear(hartid);
#include <sbi/riscv_fp.h>
#include <sbi/sbi_error.h>
#include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_pmu.h>
#include <sbi/sbi_trap.h>
#include <sbi/sbi_unpriv.h>
struct sbi_trap_info uptrap;
int i, fp = 0, shift = 0, len = 0;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_LOAD);
+
if (tinst & 0x1) {
/*
* Bit[0] == 1 implies trapped instruction value is
struct sbi_trap_info uptrap;
int i, len = 0;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_MISALIGNED_STORE);
+
if (tinst & 0x1) {
/*
* Bit[0] == 1 implies trapped instruction value is
#include <sbi/sbi_error.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_timer.h>
void sbi_timer_event_start(u64 next_event)
{
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SET_TIMER);
if (timer_dev && timer_dev->timer_event_start)
timer_dev->timer_event_start(next_event);
csr_clear(CSR_MIP, MIP_STIP);
#include <sbi/sbi_string.h>
#include <sbi/sbi_console.h>
#include <sbi/sbi_platform.h>
+#include <sbi/sbi_pmu.h>
static unsigned long tlb_sync_off;
static unsigned long tlb_fifo_off;
unsigned long vmid = tinfo->vmid;
unsigned long i, hgatp;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_RCVD);
+
hgatp = csr_swap(CSR_HGATP,
(vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
unsigned long size = tinfo->size;
unsigned long i;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_RCVD);
+
if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
__sbi_hfence_gvma_all();
return;
unsigned long size = tinfo->size;
unsigned long i;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_RCVD);
+
if ((start == 0 && size == 0) || (size == SBI_TLB_FLUSH_ALL)) {
sbi_tlb_flush_all();
return;
unsigned long vmid = tinfo->vmid;
unsigned long i, hgatp;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_ASID_RCVD);
+
hgatp = csr_swap(CSR_HGATP,
(vmid << HGATP_VMID_SHIFT) & HGATP_VMID_MASK);
unsigned long vmid = tinfo->vmid;
unsigned long i;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_VMID_RCVD);
+
if (start == 0 && size == 0) {
__sbi_hfence_gvma_all();
return;
unsigned long asid = tinfo->asid;
unsigned long i;
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_RCVD);
+
if (start == 0 && size == 0) {
sbi_tlb_flush_all();
return;
void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo)
{
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_FENCE_I_RECVD);
+
__asm__ __volatile("fence.i");
}
+static void tlb_pmu_incr_fw_ctr(struct sbi_tlb_info *data)
+{
+ if (unlikely(!data))
+ return;
+
+ if (data->local_fn == sbi_tlb_local_fence_i)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_FENCE_I_SENT);
+ else if (data->local_fn == sbi_tlb_local_sfence_vma)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_SENT);
+ else if (data->local_fn == sbi_tlb_local_sfence_vma_asid)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_SENT);
+ else if (data->local_fn == sbi_tlb_local_hfence_gvma)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_SENT);
+ else if (data->local_fn == sbi_tlb_local_hfence_gvma_vmid)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_GVMA_VMID_SENT);
+ else if (data->local_fn == sbi_tlb_local_hfence_vvma)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_SENT);
+ else if (data->local_fn == sbi_tlb_local_hfence_vvma_asid)
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_HFENCE_VVMA_ASID_SENT);
+}
+
static void sbi_tlb_entry_process(struct sbi_tlb_info *tinfo)
{
u32 rhartid;
if (!tinfo->local_fn)
return SBI_EINVAL;
+ tlb_pmu_incr_fw_ctr(tinfo);
+
return sbi_ipi_send_many(hmask, hbase, tlb_event, tinfo);
}
#include <sbi/sbi_illegal_insn.h>
#include <sbi/sbi_ipi.h>
#include <sbi/sbi_misaligned_ldst.h>
+#include <sbi/sbi_pmu.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_timer.h>
#include <sbi/sbi_trap.h>
rc = sbi_ecall_handler(regs);
msg = "ecall handler failed";
break;
+ case CAUSE_LOAD_ACCESS:
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_LOAD);
+ break;
+ case CAUSE_STORE_ACCESS:
+ sbi_pmu_ctr_incr_fw(SBI_PMU_FW_ACCESS_STORE);
+ break;
default:
/* If the trap came from S or U mode, redirect it there */
trap.epc = regs->mepc;