/* Don't deactive the channel if it is synchronized and the DMA request is
active */
- if (ch->sync && ch->enable && (s->dma->drqbmp & (1 << ch->sync)))
+ if (ch->sync && ch->enable && (s->dma->drqbmp & (1ULL << ch->sync)))
return;
if (ch->active) {
/* TODO: theoretically if ch->sync && ch->prefetch &&
* !s->dma->drqbmp[ch->sync], we should also activate and fetch
* from source and then stall until signalled. */
- if ((!ch->sync) || (s->dma->drqbmp & (1 << ch->sync)))
+ if ((!ch->sync) || (s->dma->drqbmp & (1ULL << ch->sync))) {
omap_dma_activate_channel(s, ch);
+ }
}
}
struct omap_dma_s *s = (struct omap_dma_s *) opaque;
/* The request pins are level triggered in QEMU. */
if (req) {
- if (~s->dma->drqbmp & (1 << drq)) {
- s->dma->drqbmp |= 1 << drq;
+ if (~s->dma->drqbmp & (1ULL << drq)) {
+ s->dma->drqbmp |= 1ULL << drq;
omap_dma_process_request(s, drq);
}
} else
- s->dma->drqbmp &= ~(1 << drq);
+ s->dma->drqbmp &= ~(1ULL << drq);
}
/* XXX: this won't be needed once soc_dma knows about clocks. */