Runtime: Add support for Bay Trail-T device.

According to the baytrial-t spec, baytrail-t has 4 EUs and each
EU has 8 threads. So the compute unit is 32 and the maximum
work group size is 32 * 8 which is 256.

Signed-off-by: Chuanbo Weng <chuanbo.weng@intel.com>
Signed-off-by: Zhigang Gong <zhigang.gong@linux.intel.com>

diff --git a/src/cl_device_data.h b/src/cl_device_data.h
index 9c18406..55327ec 100644 (file)
--- a/src/cl_device_data.h
+++ b/src/cl_device_data.h
@@ -68,6 +68,8 @@
 #define PCI_CHIP_IVYBRIDGE_M_GT2        0x0166
 #define PCI_CHIP_IVYBRIDGE_S_GT1        0x015a  /* Server */
 
+#define PCI_CHIP_BAYTRAIL_T 0x0F31
+
 #define IS_IVB_GT1(devid)               \
   (devid == PCI_CHIP_IVYBRIDGE_GT1 ||   \
    devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \
@@ -77,7 +79,10 @@
   (devid == PCI_CHIP_IVYBRIDGE_GT2 ||   \
    devid == PCI_CHIP_IVYBRIDGE_M_GT2)
 
-#define IS_IVYBRIDGE(devid) (IS_IVB_GT1(devid) || IS_IVB_GT2(devid))
+#define IS_BAYTRAIL_T(devid)              \
+  (devid == PCI_CHIP_BAYTRAIL_T)
+
+#define IS_IVYBRIDGE(devid) (IS_IVB_GT1(devid) || IS_IVB_GT2(devid) || IS_BAYTRAIL_T(devid))
 #define IS_GEN7(devid)      IS_IVYBRIDGE(devid)
 
 
@@ -121,6 +126,7 @@
 #define PCI_CHIP_HASWELL_CRW_M2      0x0D16 /* CRW GT2 mobile */
 #define PCI_CHIP_HASWELL_CRW_M3      0x0D26 /* CRW GT3 mobile */
 
+
 #define IS_HASWELL(devid) (  \
        (devid) == PCI_CHIP_HASWELL_D1 || (devid) == PCI_CHIP_HASWELL_D2 || \
        (devid) == PCI_CHIP_HASWELL_D3 || (devid) == PCI_CHIP_HASWELL_S1 || \

diff --git a/src/cl_device_id.c b/src/cl_device_id.c
index c6bce7d..42ae19e 100644 (file)
--- a/src/cl_device_id.c
+++ b/src/cl_device_id.c
@@ -57,6 +57,17 @@ static struct _cl_device_id intel_ivb_gt1_device = {
 #include "cl_gen7_device.h"
 };
 
+static struct _cl_device_id intel_baytrail_t_device = {
+  INIT_ICD(dispatch)
+  .max_compute_unit = 32,
+  .max_thread_per_unit = 8,
+  .max_work_item_sizes = {512, 512, 512},
+  .max_work_group_size = 256,
+  .max_clock_frequency = 1000,
+  .wg_sz = 256,
+#include "cl_gen7_device.h"
+};
+
 /* XXX we clone IVB for HSW now */
 static struct _cl_device_id intel_hsw_device = {
   INIT_ICD(dispatch)
@@ -183,6 +194,14 @@ ivb_gt2_break:
       ret = &intel_ivb_gt2_device;
       break;
 
+    case PCI_CHIP_BAYTRAIL_T:
+      DECL_INFO_STRING(baytrail_t_device_break, intel_baytrail_t_device, name, "Intel(R) HD Graphics Bay Trail-T");
+baytrail_t_device_break:
+      intel_baytrail_t_device.vendor_id = device_id;
+      intel_baytrail_t_device.platform = intel_platform;
+      ret = &intel_baytrail_t_device;
+      break;
+
     case PCI_CHIP_SANDYBRIDGE_BRIDGE:
     case PCI_CHIP_SANDYBRIDGE_GT1:
     case PCI_CHIP_SANDYBRIDGE_GT2:
@@ -265,6 +284,7 @@ cl_get_device_info(cl_device_id     device,
 {
   if (UNLIKELY(device != &intel_ivb_gt1_device &&
                device != &intel_ivb_gt2_device &&
+               device != &intel_baytrail_t_device &&
                device != &intel_hsw_device))
     return CL_INVALID_DEVICE;
 
@@ -351,11 +371,14 @@ cl_device_get_version(cl_device_id device, cl_int *ver)
 {
   if (UNLIKELY(device != &intel_ivb_gt1_device &&
                device != &intel_ivb_gt2_device &&
+               device != &intel_baytrail_t_device &&
                device != &intel_hsw_device))
     return CL_INVALID_DEVICE;
   if (ver == NULL)
     return CL_SUCCESS;
-  if (device == &intel_ivb_gt1_device || device == &intel_ivb_gt2_device)
+  if (device == &intel_ivb_gt1_device || 
+      device == &intel_ivb_gt2_device ||
+      device == &intel_baytrail_t_device)
     *ver = 7;
   else
     *ver = 75;
@@ -387,6 +410,7 @@ cl_get_kernel_workgroup_info(cl_kernel kernel,
 {
   int err = CL_SUCCESS;
   if (UNLIKELY(device != &intel_ivb_gt1_device &&
+               device != &intel_baytrail_t_device &&
                device != &intel_ivb_gt2_device))
     return CL_INVALID_DEVICE;
 

diff --git a/utests/profiling_exec.cpp b/utests/profiling_exec.cpp
index 2244300..afa55ba 100644 (file)
--- a/utests/profiling_exec.cpp
+++ b/utests/profiling_exec.cpp
@@ -66,7 +66,8 @@ static void profiling_exec(void)
     OCL_CREATE_BUFFER(buf[1], 0, n * sizeof(float), NULL);
     OCL_SET_ARG(0, sizeof(cl_mem), &buf[0]);
     OCL_SET_ARG(1, sizeof(cl_mem), &buf[1]);
-    globals[0] = locals[0] = n;
+    globals[0] = n;
+    locals[0] = 256;
 
     OCL_MAP_BUFFER(0);
     for (int32_t i = 0; i < (int32_t) n; ++i)