RISC-V: KVM: Implement SBI HSM suspend call
authorAnup Patel <apatel@ventanamicro.com>
Mon, 31 Jan 2022 07:01:36 +0000 (12:31 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 11 Mar 2022 13:32:39 +0000 (19:02 +0530)
The SBI v0.3 specification extends SBI HSM extension by adding SBI HSM
suspend call and related HART states. This patch extends the KVM RISC-V
HSM implementation to provide KVM guest a minimal SBI HSM suspend call
which is equivalent to a WFI instruction.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/kvm/vcpu_sbi_hsm.c

index 1ac4b2e..239dec0 100644 (file)
@@ -61,6 +61,8 @@ static int kvm_sbi_hsm_vcpu_get_status(struct kvm_vcpu *vcpu)
                return -EINVAL;
        if (!target_vcpu->arch.power_off)
                return SBI_HSM_STATE_STARTED;
+       else if (vcpu->stat.generic.blocking)
+               return SBI_HSM_STATE_SUSPENDED;
        else
                return SBI_HSM_STATE_STOPPED;
 }
@@ -91,6 +93,18 @@ static int kvm_sbi_ext_hsm_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
                        ret = 0;
                }
                break;
+       case SBI_EXT_HSM_HART_SUSPEND:
+               switch (cp->a0) {
+               case SBI_HSM_SUSPEND_RET_DEFAULT:
+                       kvm_riscv_vcpu_wfi(vcpu);
+                       break;
+               case SBI_HSM_SUSPEND_NON_RET_DEFAULT:
+                       ret = -EOPNOTSUPP;
+                       break;
+               default:
+                       ret = -EINVAL;
+               }
+               break;
        default:
                ret = -EOPNOTSUPP;
        }