Signed-off-by: Mike Frysinger <vapier@gentoo.org>
#ifndef _BFIN_CLOCKS_H
#define _BFIN_CLOCKS_H
+#include <asm/dpmc.h>
+
#ifdef CONFIG_CCLK_DIV_1
# define CONFIG_CCLK_ACT_DIV CCLK_DIV1
# define CONFIG_CCLK_DIV 1
#include <asm/dma.h>
#include <asm/clocks.h>
#include <asm/mem_init.h>
+#include <asm/dpmc.h>
#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */
#define PLL_CTL_VAL \
#include <linux/fs.h>
#include <asm/blackfin.h>
#include <asm/time.h>
-
+#include <asm/dpmc.h>
/* this is the table of CCLK frequencies, in Hz */
/* .index is the entry in the auxillary dpm_state_table[] */
#include <asm/blackfin.h>
#include <asm/gpio.h>
#include <asm/irq_handler.h>
+#include <asm/dpmc.h>
#define SIC_SYSIRQ(irq) (irq - (IRQ_CORETMR + 1))