drm/amd/display: Power-gate all DSCs at driver init time
authorNikola Cornij <nikola.cornij@amd.com>
Wed, 19 Jun 2019 18:30:52 +0000 (14:30 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 18 Jul 2019 19:18:10 +0000 (14:18 -0500)
[why]
DSC should be powered-on only on as-needed basis, i.e. if the mode
requires it

[how]
Loop over all the DSCs at driver init time and power-gate each

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c

index ddf15a3..5ecf965 100644 (file)
@@ -624,6 +624,10 @@ static void dcn20_init_hw(struct dc *dc)
                }
        }
 
+       /* Power gate DSCs */
+       for (i = 0; i < res_pool->res_cap->num_dsc; i++)
+               dcn20_dsc_pg_control(hws, res_pool->dscs[i]->inst, false);
+
        /* Blank pixel data with OPP DPG */
        for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
                struct timing_generator *tg = dc->res_pool->timing_generators[i];