drm/i915: fixup overlay checks for interlaced modes

The drm core _really_ likes to frob around with the crtc timings and
put halfed vertical timings (in fields) in there. Which confuses the
overlay code, resulting in it's refusal to display anything at the
lower half of an interlaced pipe.

Tested-by: Christopher Egert <cme3000@gmail.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 5542e90..91d294e 100644 (file)
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -937,10 +937,10 @@ static int check_overlay_dst(struct intel_overlay *overlay,
 {
        struct drm_display_mode *mode = &overlay->crtc->base.mode;
 
-       if (rec->dst_x < mode->crtc_hdisplay &&
-           rec->dst_x + rec->dst_width <= mode->crtc_hdisplay &&
-           rec->dst_y < mode->crtc_vdisplay &&
-           rec->dst_y + rec->dst_height <= mode->crtc_vdisplay)
+       if (rec->dst_x < mode->hdisplay &&
+           rec->dst_x + rec->dst_width <= mode->hdisplay &&
+           rec->dst_y < mode->vdisplay &&
+           rec->dst_y + rec->dst_height <= mode->vdisplay)
                return 0;
        else
                return -EINVAL;