Remove build warnings in sprd misc drivers.
Change-Id: I6d307506a956cbae56841f50a39f8fc59bc9c21e
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
\r
static int vpu_hw_reset(void);\r
\r
+#ifdef VPU_SUPPORT_CLOCK_CONTROL\r
static void vpu_clk_disable(struct clk *clk);\r
static int vpu_clk_enable(struct clk *clk);\r
static struct clk *vpu_clk_get(struct device *dev);\r
+#endif\r
static void vpu_clk_put(struct clk *clk);\r
\r
\r
\r
\r
static vpu_bit_firmware_info_t s_bit_firmware_info[MAX_NUM_VPU_CORE];\r
+#if 0\r
static struct vpu_dev vpu_hw_dev;\r
+#endif\r
\r
\r
#define BIT_BASE 0x0000\r
#define FORCE_SHUTDOWN BIT_PD_CODEC_TOP_FORCE_SHUTDOWN\r
#endif\r
\r
+#if 0\r
#ifdef CONFIG_PM\r
/* implement to power management functions */\r
static u32 s_vpu_reg_store[MAX_NUM_VPU_CORE][64];\r
static u32 s_run_index;\r
static u32 s_run_codstd;\r
#endif\r
+#endif\r
\r
static int vpu_resume(struct platform_device *pdev);\r
static int vpu_suspend(struct platform_device *pdev, pm_message_t state);\r
static int vpu_set_mm_clk(void);\r
+#if 0\r
static int vpu_set_clk_by_register(void);\r
+#endif\r
static int vpu_clk_free(vpu_drv_context_t* vpu_context);\r
static int vpu_power_on(void);\r
static int vpu_power_shutdown(void);\r
return clk_map[freq_level].name;\r
}\r
\r
-static int find_vpu_freq_level(unsigned long freq, struct clock_name_map_t clk_map[])\r
+static int __maybe_unused find_vpu_freq_level(unsigned long freq, struct clock_name_map_t clk_map[])\r
{\r
int level = 0;\r
int i;\r
\r
static int vpu_power_on(void)\r
{\r
- __raw_writel(AUTO_SHUTDOWN_EN | __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
- __raw_writel((~FORCE_SHUTDOWN) & __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
+ __raw_writel(AUTO_SHUTDOWN_EN | __raw_readl((void __iomem __force *)REG_PMU_APB_CODEC_CFG), (void __iomem __force *)REG_PMU_APB_CODEC_CFG);\r
+ __raw_writel((~FORCE_SHUTDOWN) & __raw_readl((void __iomem __force *)REG_PMU_APB_CODEC_CFG), (void __iomem __force *)REG_PMU_APB_CODEC_CFG);\r
return 0;\r
}\r
\r
static int vpu_power_shutdown(void)\r
{\r
- __raw_writel(FORCE_SHUTDOWN | __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
- __raw_writel((~AUTO_SHUTDOWN_EN) & __raw_readl(REG_PMU_APB_CODEC_CFG), REG_PMU_APB_CODEC_CFG);\r
+ __raw_writel(FORCE_SHUTDOWN | __raw_readl((void __iomem __force *)REG_PMU_APB_CODEC_CFG), (void __iomem __force *)REG_PMU_APB_CODEC_CFG);\r
+ __raw_writel((~AUTO_SHUTDOWN_EN) & __raw_readl((void __iomem __force *)REG_PMU_APB_CODEC_CFG), (void __iomem __force *)REG_PMU_APB_CODEC_CFG);\r
return 0;\r
}\r
\r
ret = vpu_set_mm_clk();\r
\r
#if 0\r
- vpu_logi("[VPUDRV] REG_PMU_APB_PD_MM_TOP_CFG : 0x%x\n", __raw_readl(REG_PMU_APB_PD_MM_TOP_CFG));\r
- vpu_logi("[VPUDRV] REG_AON_APB_APB_EB0 : 0x%x\n", __raw_readl(REG_AON_APB_APB_EB0));\r
- vpu_logi("[VPUDRV] REG_AON_APB_APB_EB1 : 0x%x\n", __raw_readl(REG_AON_APB_APB_EB1));\r
- vpu_logi("[VPUDRV] REG_CODEC_AHB_CLOCK_SEL : 0x%x\n", __raw_readl(REG_CODEC_AHB_CLOCK_SEL));\r
- vpu_logi("[VPUDRV] REG_CODEC_AHB_CKG_ENABLE : 0x%x\n", __raw_readl(REG_CODEC_AHB_CKG_ENABLE));\r
+ vpu_logi("[VPUDRV] REG_PMU_APB_PD_MM_TOP_CFG : 0x%x\n", __raw_readl((void __iomem __force *)REG_PMU_APB_PD_MM_TOP_CFG));\r
+ vpu_logi("[VPUDRV] REG_AON_APB_APB_EB0 : 0x%x\n", __raw_readl((void __iomem __force *)REG_AON_APB_APB_EB0));\r
+ vpu_logi("[VPUDRV] REG_AON_APB_APB_EB1 : 0x%x\n", __raw_readl((void __iomem __force *)REG_AON_APB_APB_EB1));\r
+ vpu_logi("[VPUDRV] REG_CODEC_AHB_CLOCK_SEL : 0x%x\n", __raw_readl((void __iomem __force *)REG_CODEC_AHB_CLOCK_SEL));\r
+ vpu_logi("[VPUDRV] REG_CODEC_AHB_CKG_ENABLE : 0x%x\n", __raw_readl((void __iomem __force *)REG_CODEC_AHB_CKG_ENABLE));\r
#endif\r
\r
#if defined(CONFIG_SPRD_IOMMU)\r
\r
static int vpu_release(struct inode *inode, struct file *filp)\r
{\r
- int reg_addr;\r
-\r
spin_lock(&s_vpu_lock);\r
\r
vpu_logi("[VPUDRV] vpu_release, open_count= %d\n", s_vpu_drv_context.open_count);\r
{\r
int err = 0;\r
int ret;\r
- int reg_addr;\r
struct resource *res = NULL;\r
\r
vpu_logi("[VPUDRV] vpu_probe\n");\r
{\r
int res = 0;\r
\r
- vpu_logd("vpu_init, REG_AON_APB_BOND_OPT0 = 0x%x\n", __raw_readl(REG_AON_APB_BOND_OPT0));\r
+ vpu_logd("vpu_init, REG_AON_APB_BOND_OPT0 = 0x%x\n", __raw_readl((void __iomem __force *)REG_AON_APB_BOND_OPT0));\r
\r
- if(__raw_readl(REG_AON_APB_BOND_OPT0) & (1<<12)) {\r
+ if(__raw_readl((void __iomem __force *)REG_AON_APB_BOND_OPT0) & (1<<12)) {\r
return 0;\r
}\r
\r
#ifdef VPU_SUPPORT_PLATFORM_DRIVER_REGISTER\r
vpu_logd("vpu_exit\n");\r
\r
- if(__raw_readl(REG_AON_APB_BOND_OPT0) & (1<<12)) {\r
+ if(__raw_readl((void __iomem __force *)REG_AON_APB_BOND_OPT0) & (1<<12)) {\r
return ;\r
}\r
\r
#if 0\r
static int vpu_set_clk_by_register()\r
{\r
- __raw_writel((~(1<<25))&__raw_readl(REG_PMU_APB_PD_MM_TOP_CFG), REG_PMU_APB_PD_MM_TOP_CFG); //0x402b_001c (&0xfdff_ffff)\r
- __raw_writel((0x02000000)|__raw_readl(REG_AON_APB_APB_EB0), REG_AON_APB_APB_EB0); //0x402e_0000 (|0x0200_0000)\r
+ __raw_writel((~(1<<25))&__raw_readl((void __iomem __force *)REG_PMU_APB_PD_MM_TOP_CFG), (void __iomem __force *)REG_PMU_APB_PD_MM_TOP_CFG); //0x402b_001c (&0xfdff_ffff)\r
+ __raw_writel((0x02000000)|__raw_readl((void __iomem __force *)REG_AON_APB_APB_EB0), (void __iomem __force *)REG_AON_APB_APB_EB0); //0x402e_0000 (|0x0200_0000)\r
\r
- __raw_writel(__raw_readl(REG_AON_APB_APB_EB1) | BIT_CODEC_EB, REG_AON_APB_APB_EB1); //0x402e_0004 (|0x0000_4000)\r
- __raw_writel(__raw_readl(REG_CODEC_AHB_CLOCK_SEL) | 0x0333, REG_CODEC_AHB_CLOCK_SEL); //6200_0008 (|0x0333)\r
- __raw_writel(__raw_readl(REG_CODEC_AHB_CKG_ENABLE) | 0x03, REG_CODEC_AHB_CKG_ENABLE); //6200_0004 (|0x03)\r
+ __raw_writel(__raw_readl((void __iomem __force *)REG_AON_APB_APB_EB1) | BIT_CODEC_EB, (void __iomem __force *)REG_AON_APB_APB_EB1); //0x402e_0004 (|0x0000_4000)\r
+ __raw_writel(__raw_readl((void __iomem __force *)REG_CODEC_AHB_CLOCK_SEL) | 0x0333, (void __iomem __force *)REG_CODEC_AHB_CLOCK_SEL); //6200_0008 (|0x0333)\r
+ __raw_writel(__raw_readl((void __iomem __force *)REG_CODEC_AHB_CKG_ENABLE) | 0x03, (void __iomem __force *)REG_CODEC_AHB_CKG_ENABLE); //6200_0004 (|0x03)\r
\r
return 0;\r
}\r
return ret;\r
}\r
\r
+#ifdef VPU_SUPPORT_CLOCK_CONTROL\r
struct clk *vpu_clk_get(struct device *dev)\r
{\r
return clk_get(dev, VPU_CLK_NAME);\r
}\r
+#endif\r
+\r
void vpu_clk_put(struct clk *clk)\r
{\r
if (!(clk == NULL || IS_ERR(clk)))\r
clk_put(clk);\r
}\r
+\r
+#ifdef VPU_SUPPORT_CLOCK_CONTROL\r
int vpu_clk_enable(struct clk *clk)\r
{\r
\r
}\r
#endif\r
}\r
-\r
+#endif\r
\r
vmem = ioremap_nocache(cproc->initdata->base + *ppos + CPROC_VMALLOC_SIZE_LIMIT*i, CPROC_VMALLOC_SIZE_LIMIT);
if (!vmem) {
size_t addr = cproc->initdata->base + *ppos + CPROC_VMALLOC_SIZE_LIMIT*i;
- printk(KERN_ERR "Unable to map cproc base: 0x%lx\n", addr);
+ printk(KERN_ERR "Unable to map cproc base: 0x%zx\n", addr);
if(i > 0){
*ppos += CPROC_VMALLOC_SIZE_LIMIT*i;
return CPROC_VMALLOC_SIZE_LIMIT*i;
vmem = ioremap_nocache(base + offset + CPROC_VMALLOC_SIZE_LIMIT*i, CPROC_VMALLOC_SIZE_LIMIT);
if (!vmem) {
size_t addr = base + offset + CPROC_VMALLOC_SIZE_LIMIT*i;
- printk(KERN_ERR "Unable to map cproc base: 0x%lx\n", addr);
+ printk(KERN_ERR "Unable to map cproc base: 0x%zx\n", addr);
if(i > 0){
*ppos += CPROC_VMALLOC_SIZE_LIMIT*i;
return CPROC_VMALLOC_SIZE_LIMIT*i;
struct cproc_device *cproc = (struct cproc_device *)arg;
struct cproc_init_data *pdata = cproc->initdata;
struct cproc_ctrl *ctrl;
- uint32_t value, state;
+ uint32_t state;
void *vmem = NULL;
if (!pdata) {
break;
}
#endif
- pr_info("deep sllep reg =0x%x, reset reg =0x%x\n", ctrl->ctrl_reg[CPROC_CTRL_DEEP_SLEEP], ctrl->ctrl_reg[CPROC_CTRL_RESET]);
+ pr_info("deep sllep reg =0x%lx, reset reg =0x%lx\n", ctrl->ctrl_reg[CPROC_CTRL_DEEP_SLEEP], ctrl->ctrl_reg[CPROC_CTRL_RESET]);
pr_info("deep sllep mask =0x%x, reset mask =0x%x\n", ctrl->ctrl_mask[CPROC_CTRL_DEEP_SLEEP], ctrl->ctrl_mask[CPROC_CTRL_RESET]);
if(ctrl->ctrl_reg[CPROC_CTRL_DEEP_SLEEP] != INVALID_REG){
struct resource res;
struct device_node *np = dev->of_node, *chd;
int ret, i, segnr;
- uint32_t base, offset;
uint32_t ctrl_reg[4] = {0};
size_t reg_base[6] = {0};
goto error;
}
reg_base[i] = res.start;
- pr_info("sprd_cproc: base 0x%lx\n", reg_base[i]);
+ pr_info("sprd_cproc: base 0x%x\n", reg_base[i]);
}
/* get ctrl_reg addr on pmu base */
ret = of_property_read_u32_array(np, "sprd,ctrl-reg", ctrl_reg, CPROC_CTRL_NR);
goto error;
}
for (i = 0; i < CPROC_CTRL_NR; i++) {
- pr_info("sprd_cproc before p2v: ctrl_reg[%d] = 0x%lx\n", i, ctrl_reg[i]);
+ pr_info("sprd_cproc before p2v: ctrl_reg[%d] = 0x%x\n", i, ctrl_reg[i]);
if(ctrl_reg[i] != INVALID_REG){
ctrl_reg[i] += reg_base[i+2];
ctrl->ctrl_reg[i] = SPRD_DEV_P2V(ctrl_reg[i]);
goto error;
}
ctrl->iram_addr = res.start;
- pr_info("sprd_cproc: iram_addr=0x%x\n", ctrl->iram_addr);
+ pr_info("sprd_cproc: iram_addr=0x%lx\n", ctrl->iram_addr);
/* get irq */
pdata->wdtirq = irq_of_parse_and_map(np, 0);
i++;
}
- pr_info("sprd_cproc: stop callback 0x%x, start callback 0x%x\n",
+ pr_info("sprd_cproc: stop callback %p, start callback %p\n",
sprd_cproc_native_cp_stop, sprd_cproc_native_cp_start);
pdata->segnr = segnr;
}
- pr_info("%s %p %x\n", __func__, pdata->base, pdata->maxsz);
+ pr_info("%s 0x%lx %x\n", __func__, pdata->base, pdata->maxsz);
#if 0
if ( pdata->base == WCN_START_ADDR)
set_section_ro(__va(pdata->base), (WCN_TOTAL_SIZE & ~(SECTION_SIZE - 1)) >> SECTION_SHIFT);
return clock_name_map[freq_level].name;
}
-static int find_deint_freq_level(unsigned long freq)
+static int __maybe_unused find_deint_freq_level(unsigned long freq)
{
int level = 0;
int i;
static long deint_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
{
int ret;
- struct clk *clk_parent;
- char *name_parent;
- unsigned long frequency;
struct deint_fh *deint_fp = filp->private_data;
if (deint_fp == NULL) {
return -EACCES;
}
- printk(KERN_ERR "SPRD_VPP_FREE_PHYSICAL_MEMORY base: 0x%x, phys_addr: 0x%x, size: 0x%x, virt_addr: 0x%x\n",
+ printk(KERN_ERR "SPRD_VPP_FREE_PHYSICAL_MEMORY base: 0x%lx, phys_addr: 0x%x, size: 0x%x, virt_addr: 0x%lx\n",
vb.base, vb.phys_addr, vb.size, vb.virt_addr);
if (vb.base)
ret = -ETIMEDOUT;
/*clear vpp int*/
- __raw_writel((1<<1), SPRD_VPP_BASE + VPP_INT_CLR);
+ __raw_writel((1<<1), (void __iomem __force *)(SPRD_VPP_BASE + VPP_INT_CLR));
}
put_user(ret, (int __user *)arg);
return IRQ_NONE;
}
- ret = __raw_readl(SPRD_VPP_BASE + VPP_INT_STS);
+ ret = __raw_readl((void __iomem __force *)(SPRD_VPP_BASE + VPP_INT_STS));
if((ret >> 1) & 0x1)
{
- __raw_writel((1<<1), SPRD_VPP_BASE + VPP_INT_CLR);
+ __raw_writel((1<<1), (void __iomem __force *)(SPRD_VPP_BASE + VPP_INT_CLR));
}
else
{
static int deint_suspend(struct platform_device *pdev, pm_message_t state)
{
- int ret=-1;
int cnt;
int instance_cnt = atomic_read(&deint_instance_cnt);
static int deint_probe(struct platform_device *pdev)
{
int ret;
- struct resource *res = NULL;
printk(KERN_INFO "deint_probe called !\n");
static int total_capacity = 0;
struct clock_name_map_t {
unsigned long freq;
- char *name;
+ const char *name;
};
#ifdef CONFIG_OF
static int max_freq_level = SPRD_VSP_CLK_LEVEL_NUM;
-static char *vsp_get_clk_src_name(unsigned int freq_level)
+static const char *vsp_get_clk_src_name(unsigned int freq_level)
{
if (freq_level >= max_freq_level ) {
printk(KERN_INFO "set freq_level to 0");
{
int ret;
struct clk *clk_parent;
- char *name_parent;
+ const char *name_parent;
unsigned long frequency;
struct vsp_fh *vsp_fp = filp->private_data;
{
struct device_node *np = dev->of_node;
struct device_node *vsp_clk_np = NULL;
- char *vsp_clk_node_name = NULL;
+ const char *vsp_clk_node_name = NULL;
struct resource res;
int i, ret, clk_count = 0;
for(i = 0; i < clk_count; i++) {
struct clk *clk_parent;
- char *name_parent;
+ const char *name_parent;
unsigned long frequency;
name_parent = of_clk_get_parent_name(vsp_clk_np, i);
- clk_parent = clk_get(vsp_clk_np, name_parent);
+ clk_parent = clk_get(NULL, name_parent);
frequency = clk_get_rate(clk_parent);
- printk(KERN_INFO "vsp clk order in dts file: clk[%d] = (%d, %s)\n", i, frequency, name_parent);
+ printk(KERN_INFO "vsp clk order in dts file: clk[%d] = (%lu, %s)\n", i, frequency, name_parent);
clock_name_map[max_freq_level-1-i].name = name_parent;
clock_name_map[max_freq_level-1-i].freq = frequency;
struct clk *clk_mm_i;
struct clk *clk_vsp;
struct clk *clk_parent;
- char *name_parent;
+ const char *name_parent;
int instance_cnt = atomic_read(&vsp_instance_cnt);
printk(KERN_INFO "vsp_set_mm_clk: vsp_instance_cnt %d\n", instance_cnt);
static int vsp_release (struct inode *inode, struct file *filp)
{
- int ret;
struct vsp_fh *vsp_fp = filp->private_data;
int instance_cnt = atomic_read(&vsp_instance_cnt);
static int vsp_suspend(struct platform_device *pdev, pm_message_t state)
{
- int ret=-1;
int cnt;
int instance_cnt = atomic_read(&vsp_instance_cnt);