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riscv: dts: thead: set dma-noncoherent to soc bus
author
Jisheng Zhang
<jszhang@kernel.org>
Tue, 12 Sep 2023 07:22:32 +0000
(15:22 +0800)
committer
Arnd Bergmann
<arnd@arndb.de>
Tue, 17 Oct 2023 19:00:24 +0000
(21:00 +0200)
riscv select ARCH_DMA_DEFAULT_COHERENT by default, and th1520 isn't
dma coherent, so set dma-noncoherent to reflect this fact.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Tested-by: Drew Fustini <dfustini@baylibre.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/riscv/boot/dts/thead/th1520.dtsi
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diff --git
a/arch/riscv/boot/dts/thead/th1520.dtsi
b/arch/riscv/boot/dts/thead/th1520.dtsi
index
ce70818
..
ff36470
100644
(file)
--- a/
arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/
arch/riscv/boot/dts/thead/th1520.dtsi
@@
-139,6
+139,7
@@
interrupt-parent = <&plic>;
#address-cells = <2>;
#size-cells = <2>;
+ dma-noncoherent;
ranges;
plic: interrupt-controller@ffd8000000 {