dts: starfive: Modified PCIe pin setting for bring up PCIe USB hub.

Based on VisionFive V2 SCH.

Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
index d91ee09..3c7ff2a 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
+++ b/arch/riscv/boot/dts/starfive/jh7110-visionfive-v2.dts
@@ -375,11 +375,29 @@
                };
        };
 
-       pcie0_power_active: pcie0_power_active {
-               power-pins {
+       pcie0_wake_default: pcie0_wake_default {
+               wake-pins {
                        sf,pins = <PAD_GPIO32>;
                        sf,pinmux = <PAD_GPIO32_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-doen = <OEN_HIGH>;
+               };
+       };
+
+       pcie0_clkreq_default: pcie0_clkreq_default {
+               clkreq-pins {
+                       sf,pins = <PAD_GPIO27>;
+                       sf,pinmux = <PAD_GPIO27_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-doen = <OEN_HIGH>;
+               };
+       };
+
+       pcie0_vbus_default: pcie0_vbus_default {
+               drive-vbus-pin {
+                       sf,pins = <PAD_GPIO25>;
+                       sf,pinmux = <PAD_GPIO25_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
                        sf,pin-gpio-dout = <GPO_HIGH>;
                        sf,pin-gpio-doen = <OEN_LOW>;
                };
@@ -405,13 +423,21 @@
                };
        };
 
-       pcie1_power_active: pcie1_power_active {
-               power-pins {
+       pcie1_wake_default: pcie1_wake_default {
+               wake-pins {
                        sf,pins = <PAD_GPIO21>;
                        sf,pinmux = <PAD_GPIO21_FUNC_SEL 0>;
                        sf,pin-ioconfig = <IO(GPIO_IE(1))>;
-                       sf,pin-gpio-dout = <GPO_HIGH>;
-                       sf,pin-gpio-doen = <OEN_LOW>;
+                       sf,pin-gpio-doen = <OEN_HIGH>;
+               };
+       };
+
+       pcie1_clkreq_default: pcie1_clkreq_default {
+               clkreq-pins {
+                       sf,pins = <PAD_GPIO29>;
+                       sf,pinmux = <PAD_GPIO29_FUNC_SEL 0>;
+                       sf,pin-ioconfig = <IO(GPIO_IE(1))>;
+                       sf,pin-gpio-doen = <OEN_HIGH>;
                };
        };
 
@@ -775,18 +801,21 @@
 };
 
 &pcie0 {
-       pinctrl-names = "perst-default", "perst-active", "power-active";
-       pinctrl-0 = <&pcie0_perst_default>;
-       pinctrl-1 = <&pcie0_perst_active>;
-       pinctrl-2 = <&pcie0_power_active>;
+       pinctrl-names = "default", "perst-default", "perst-active";
+       pinctrl-0 = <&pcie0_wake_default>,
+                   <&pcie0_clkreq_default>,
+                   <&pcie0_vbus_default>;
+       pinctrl-1 = <&pcie0_perst_default>;
+       pinctrl-2 = <&pcie0_perst_active>;
        status = "okay";
 };
 
 &pcie1 {
-       pinctrl-names = "perst-default", "perst-active", "power-active";
-       pinctrl-0 = <&pcie1_perst_default>;
-       pinctrl-1 = <&pcie1_perst_active>;
-       pinctrl-2 = <&pcie1_power_active>;
+       pinctrl-names = "default", "perst-default", "perst-active";
+       pinctrl-0 = <&pcie1_wake_default>,
+                   <&pcie1_clkreq_default>;
+       pinctrl-1 = <&pcie1_perst_default>;
+       pinctrl-2 = <&pcie1_perst_active>;
        status = "okay";
 };
 

diff --git a/drivers/pci/controller/pcie-plda.c b/drivers/pci/controller/pcie-plda.c
index cde8f7b..49b43f2 100644 (file)
--- a/drivers/pci/controller/pcie-plda.c
+++ b/drivers/pci/controller/pcie-plda.c
@@ -156,8 +156,6 @@ struct plda_pcie {
        struct pinctrl *pinctrl;
        struct pinctrl_state *perst_state_def;
        struct pinctrl_state *perst_state_active;
-       struct pinctrl_state *power_state_def;
-       struct pinctrl_state *power_state_active;
 };
 
 static inline void plda_writel(struct plda_pcie *pcie, const u32 value,
@@ -742,20 +740,6 @@ int plda_pinctrl_init(struct plda_pcie *pcie)
                return -EINVAL;
        }
 
-       pcie->power_state_def
-               = pinctrl_lookup_state(pcie->pinctrl, "power-default");
-       if (IS_ERR_OR_NULL(pcie->power_state_def)) {
-               dev_err(dev, "Failed to get the power-default pinctrl handle\n");
-               return -EINVAL;
-       }
-
-       pcie->power_state_active
-               = pinctrl_lookup_state(pcie->pinctrl, "power-active");
-       if (IS_ERR_OR_NULL(pcie->power_state_active)) {
-               dev_err(dev, "Failed to get the power-active pinctrl handle\n");
-               return -EINVAL;
-       }
-
        return 0;
 }
 
@@ -765,12 +749,6 @@ static void plda_pcie_hw_init(struct plda_pcie *pcie)
        int i, ret;
        struct device *dev = &pcie->pdev->dev;
 
-       if (pcie->power_state_active) {
-               ret = pinctrl_select_state(pcie->pinctrl, pcie->power_state_active);
-               if (ret)
-                       dev_err(dev, "Cannot set power pin to high\n");
-       }
-
        if (pcie->perst_state_active) {
                ret = pinctrl_select_state(pcie->pinctrl, pcie->perst_state_active);
                if (ret)
@@ -964,9 +942,6 @@ exit:
        return ret;
 
 release:
-       if (pcie->power_state_def &&
-           pinctrl_select_state(pcie->pinctrl, pcie->power_state_def))
-               dev_err(dev, "Cannot set power pin to low\n");
        plda_clk_rst_deinit(pcie);
 
        pm_runtime_put_sync(&pdev->dev);