riscv: qemu: Switch to use binman to generate u-boot.itb

By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along
with a new dedicated device tree source file for the QEMU virt target
used for binman only, we can now use binman to generate u-boot.itb.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/riscv/cpu/generic/Kconfig b/arch/riscv/cpu/generic/Kconfig
index 6f73bdd..e025134 100644 (file)
--- a/arch/riscv/cpu/generic/Kconfig
+++ b/arch/riscv/cpu/generic/Kconfig
@@ -4,6 +4,7 @@
 
 config GENERIC_RISCV
        bool
+       select BINMAN if SPL
        select ARCH_EARLY_INIT_R
        imply CPU
        imply CPU_RISCV

diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile
index 3780334..26ef853 100644 (file)
--- a/arch/riscv/dts/Makefile
+++ b/arch/riscv/dts/Makefile
@@ -2,6 +2,7 @@
 
 dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb
 dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
+dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt.dtb
 dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
 dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
 

diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi
index e02597e..d26cfdb 100644 (file)
--- a/arch/riscv/dts/binman.dtsi
+++ b/arch/riscv/dts/binman.dtsi
@@ -48,21 +48,29 @@
                                        };
                                };
 
+#ifndef CONFIG_OF_PRIOR_STAGE
                                @fdt-SEQ {
                                        description = "NAME";
                                        type = "flat_dt";
                                        compression = "none";
                                };
+#endif
                        };
 
                        configurations {
                                default = "conf-1";
 
+#ifndef CONFIG_OF_PRIOR_STAGE
                                @conf-SEQ {
+#else
+                               conf-1 {
+#endif
                                        description = "NAME";
                                        firmware = "opensbi";
                                        loadables = "uboot";
+#ifndef CONFIG_OF_PRIOR_STAGE
                                        fdt = "fdt-SEQ";
+#endif
                                };
                        };
                };

diff --git a/arch/riscv/dts/qemu-virt.dts b/arch/riscv/dts/qemu-virt.dts
new file mode 100644 (file)
index 0000000..fecff54
--- /dev/null
+++ b/arch/riscv/dts/qemu-virt.dts
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021, Bin Meng <bmeng.cn@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "binman.dtsi"

diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig
index 18dfe33..a4c1566 100644 (file)
--- a/configs/qemu-riscv32_spl_defconfig
+++ b/configs/qemu-riscv32_spl_defconfig
@@ -2,11 +2,13 @@ CONFIG_RISCV=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
 CONFIG_SPL=y
+CONFIG_DEFAULT_DEVICE_TREE="qemu-virt"
 CONFIG_TARGET_QEMU_VIRT=y
 CONFIG_RISCV_SMODE=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set

diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig
index 897adf6..6c68048 100644 (file)
--- a/configs/qemu-riscv64_spl_defconfig
+++ b/configs/qemu-riscv64_spl_defconfig
@@ -2,12 +2,14 @@ CONFIG_RISCV=y
 CONFIG_NR_DRAM_BANKS=1
 CONFIG_ENV_SIZE=0x20000
 CONFIG_SPL=y
+CONFIG_DEFAULT_DEVICE_TREE="qemu-virt"
 CONFIG_TARGET_QEMU_VIRT=y
 CONFIG_ARCH_RV64I=y
 CONFIG_RISCV_SMODE=y
 CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_DISPLAY_CPUINFO=y
 CONFIG_DISPLAY_BOARDINFO=y
 # CONFIG_CMD_MII is not set