Merge branch 'remotes/lorenzo/pci/aardvark'

- Update comment about delay before link training (Pali Rohár)

* remotes/lorenzo/pci/aardvark:
  PCI: aardvark: Update comment about disabling link training

diff --combined drivers/pci/controller/pci-aardvark.c
index 1043e54,f742da2..051b48b
--- 1/drivers/pci/controller/pci-aardvark.c
--- 2/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@@ -16,7 -16,6 +16,7 @@@
  #include <linux/kernel.h>
  #include <linux/module.h>
  #include <linux/pci.h>
 +#include <linux/pci-ecam.h>
  #include <linux/init.h>
  #include <linux/phy/phy.h>
  #include <linux/platform_device.h>
@@@ -165,6 -164,14 +165,6 @@@
  #define PCIE_CONFIG_WR_TYPE0                  0xa
  #define PCIE_CONFIG_WR_TYPE1                  0xb
  
 -#define PCIE_CONF_BUS(bus)                    (((bus) & 0xff) << 20)
 -#define PCIE_CONF_DEV(dev)                    (((dev) & 0x1f) << 15)
 -#define PCIE_CONF_FUNC(fun)                   (((fun) & 0x7)  << 12)
 -#define PCIE_CONF_REG(reg)                    ((reg) & 0xffc)
 -#define PCIE_CONF_ADDR(bus, devfn, where)     \
 -      (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn))    | \
 -       PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where))
 -
  #define PIO_RETRY_CNT                 500
  #define PIO_RETRY_DELAY                       2 /* 2 us*/
  
@@@ -252,7 -259,14 +252,14 @@@ static void advk_pcie_issue_perst(struc
        if (!pcie->reset_gpio)
                return;
  
-       /* PERST does not work for some cards when link training is enabled */
+       /*
+        * As required by PCI Express spec (PCI Express Base Specification, REV.
+        * 4.0 PCI Express, February 19 2014, 6.6.1 Conventional Reset) a delay
+        * for at least 100ms after de-asserting PERST# signal is needed before
+        * link training is enabled. So ensure that link training is disabled
+        * prior de-asserting PERST# signal to fulfill that PCI Express spec
+        * requirement.
+        */
        reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
        reg &= ~LINK_TRAINING_EN;
        advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
@@@ -680,7 -694,7 +687,7 @@@ static int advk_pcie_rd_conf(struct pci
        advk_writel(pcie, reg, PIO_CTRL);
  
        /* Program the address registers */
 -      reg = PCIE_CONF_ADDR(bus->number, devfn, where);
 +      reg = ALIGN_DOWN(PCIE_ECAM_OFFSET(bus->number, devfn, where), 4);
        advk_writel(pcie, reg, PIO_ADDR_LS);
        advk_writel(pcie, 0, PIO_ADDR_MS);
  
@@@ -741,7 -755,7 +748,7 @@@ static int advk_pcie_wr_conf(struct pci
        advk_writel(pcie, reg, PIO_CTRL);
  
        /* Program the address registers */
 -      reg = PCIE_CONF_ADDR(bus->number, devfn, where);
 +      reg = ALIGN_DOWN(PCIE_ECAM_OFFSET(bus->number, devfn, where), 4);
        advk_writel(pcie, reg, PIO_ADDR_LS);
        advk_writel(pcie, 0, PIO_ADDR_MS);