ARM: dts: stm32: Add lptimer definitions to stm32h743

Add lptimer definitions, depending on features they provide:
- lptimer1 & 2 can act as PWM, trigger and encoder/counter
- lptimer3 can act as PWM and trigger
- lptimer4 & 5 can act as PWM

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index a744136..cda67e8 100644 (file)
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -66,6 +66,32 @@
                        clocks = <&timer_clk>;
                };
 
+               lptimer1: timer@40002400 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x40002400 0x400>;
+                       clocks = <&timer_clk>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               status = "disabled";
+                       };
+
+                       trigger@0 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <0>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-lptimer-counter";
+                               status = "disabled";
+                       };
+               };
+
                usart2: serial@40004400 {
                        compatible = "st,stm32f7-usart", "st,stm32f7-uart";
                        reg = <0x40004400 0x400>;
@@ -172,6 +198,83 @@
                        };
                };
 
+               lptimer2: timer@58002400 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x58002400 0x400>;
+                       clocks = <&timer_clk>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               status = "disabled";
+                       };
+
+                       trigger@1 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <1>;
+                               status = "disabled";
+                       };
+
+                       counter {
+                               compatible = "st,stm32-lptimer-counter";
+                               status = "disabled";
+                       };
+               };
+
+               lptimer3: timer@58002800 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x58002800 0x400>;
+                       clocks = <&timer_clk>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               status = "disabled";
+                       };
+
+                       trigger@2 {
+                               compatible = "st,stm32-lptimer-trigger";
+                               reg = <2>;
+                               status = "disabled";
+                       };
+               };
+
+               lptimer4: timer@58002c00 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x58002c00 0x400>;
+                       clocks = <&timer_clk>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               status = "disabled";
+                       };
+               };
+
+               lptimer5: timer@58003000 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "st,stm32-lptimer";
+                       reg = <0x58003000 0x400>;
+                       clocks = <&timer_clk>;
+                       clock-names = "mux";
+                       status = "disabled";
+
+                       pwm {
+                               compatible = "st,stm32-pwm-lp";
+                               status = "disabled";
+                       };
+               };
+
                vrefbuf: regulator@58003C00 {
                        compatible = "st,stm32-vrefbuf";
                        reg = <0x58003C00 0x8>;