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ARM: mach-shmobile: r8a7779 PFC IPSR4 fix
author
Magnus Damm
<damm@opensource.se>
Mon, 30 Jan 2012 02:25:07 +0000
(11:25 +0900)
committer
Paul Mundt
<lethal@linux-sh.org>
Fri, 24 Feb 2012 04:24:59 +0000
(13:24 +0900)
Fix the bit field width information for the IPSR4 register
in the r8a7779 pin function controller (PFC).
Without this fix the Marzen board fails to receive data
over the serial console due to misconfigured pin function
for the RX pin.
Signed-off-by: Magnus Damm <damm@opensource.se>
Tested-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
arch/arm/mach-shmobile/pfc-r8a7779.c
patch
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diff --git
a/arch/arm/mach-shmobile/pfc-r8a7779.c
b/arch/arm/mach-shmobile/pfc-r8a7779.c
index
963532f
..
d14c9b0
100644
(file)
--- a/
arch/arm/mach-shmobile/pfc-r8a7779.c
+++ b/
arch/arm/mach-shmobile/pfc-r8a7779.c
@@
-2120,7
+2120,7
@@
static struct pinmux_cfg_reg pinmux_config_regs[] = {
FN_AUDATA3, 0, 0, 0 }
},
{ PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
- 3, 1, 1, 1, 1, 1, 1, 3, 3,
1,
+ 3, 1, 1, 1, 1, 1, 1, 3, 3,
1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
/* IP4_31_29 [3] */
FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,