ARM: dts: imx: cpus/cpu nodes dts updates
authorLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 18 Apr 2013 17:34:06 +0000 (18:34 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 22 Jul 2013 01:21:34 +0000 (18:21 -0700)
commit 7925e89f54fc49bcd1e73f0a65c4a3eb35b9cfb1 upstream.

This patch updates the in-kernel dts files according to the latest cpus
and cpu bindings updates for ARM.

Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/boot/dts/imx23.dtsi
arch/arm/boot/dts/imx28.dtsi
arch/arm/boot/dts/imx6dl.dtsi
arch/arm/boot/dts/imx6q.dtsi

index 73fd7d0..587ceef 100644 (file)
        };
 
        cpus {
-               cpu@0 {
-                       compatible = "arm,arm926ejs";
+               #address-cells = <0>;
+               #size-cells = <0>;
+
+               cpu {
+                       compatible = "arm,arm926ej-s";
+                       device_type = "cpu";
                };
        };
 
index 600f7cb..4c10a19 100644 (file)
        };
 
        cpus {
-               cpu@0 {
-                       compatible = "arm,arm926ejs";
+               #address-cells = <0>;
+               #size-cells = <0>;
+
+               cpu {
+                       compatible = "arm,arm926ej-s";
+                       device_type = "cpu";
                };
        };
 
index 5bcdf3a..62dc781 100644 (file)
 
                cpu@0 {
                        compatible = "arm,cortex-a9";
+                       device_type = "cpu";
                        reg = <0>;
                        next-level-cache = <&L2>;
                };
 
                cpu@1 {
                        compatible = "arm,cortex-a9";
+                       device_type = "cpu";
                        reg = <1>;
                        next-level-cache = <&L2>;
                };
index 21e6758..dc54a72 100644 (file)
@@ -18,6 +18,7 @@
 
                cpu@0 {
                        compatible = "arm,cortex-a9";
+                       device_type = "cpu";
                        reg = <0>;
                        next-level-cache = <&L2>;
                        operating-points = <
 
                cpu@1 {
                        compatible = "arm,cortex-a9";
+                       device_type = "cpu";
                        reg = <1>;
                        next-level-cache = <&L2>;
                };
 
                cpu@2 {
                        compatible = "arm,cortex-a9";
+                       device_type = "cpu";
                        reg = <2>;
                        next-level-cache = <&L2>;
                };
 
                cpu@3 {
                        compatible = "arm,cortex-a9";
+                       device_type = "cpu";
                        reg = <3>;
                        next-level-cache = <&L2>;
                };