clk:starfive:Set PLL2 frequency when clock tree registering

In the file drivers/clk/starfive/clk-starfive-jh7110-pll.h,
If set PLL2_DEFAULT_FREQ NULL of 0 , then PLL2 frequency is original.
If set PLL2_DEFAULT_FREQ one of 'starfive_pll2_freq_value', then PLL2
frequency will be set the new rate during clock tree registering.

Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-pll.c b/drivers/clk/starfive/clk-starfive-jh7110-pll.c
index b2d5970..4afb5dc 100755 (executable)
--- a/drivers/clk/starfive/clk-starfive-jh7110-pll.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-pll.c
@@ -441,6 +441,14 @@ int __init clk_starfive_jh7110_pll_init(struct platform_device *pdev,
 
        dev_info(&pdev->dev, "PLL0 and PLL2 clock be set done\n");
 
+/* Change PLL2 rate before other driver up */
+       if (PLL2_DEFAULT_FREQ) {
+               struct clk *pll2_clk = pll_priv[PLL2_INDEX].hw.clk;
+
+               if (clk_set_rate(pll2_clk, PLL2_DEFAULT_FREQ))
+                       dev_info(&pdev->dev, "set pll2 failed\n");
+       }
+
        return 0;
 
 pll_init_failed:

diff --git a/drivers/clk/starfive/clk-starfive-jh7110-pll.h b/drivers/clk/starfive/clk-starfive-jh7110-pll.h
index 71c6f82..b812b72 100755 (executable)
--- a/drivers/clk/starfive/clk-starfive-jh7110-pll.h
+++ b/drivers/clk/starfive/clk-starfive-jh7110-pll.h
@@ -8,7 +8,12 @@
 #ifndef _CLK_STARFIVE_JH7110_PLL_H_
 #define _CLK_STARFIVE_JH7110_PLL_H_
 
-#define PLL2_DEFAULT_FREQ      PLL2_FREQ_1188_VALUE
+/*
+ * If set PLL2_DEFAULT_FREQ NULL of 0 , then PLL2 frequency is original.
+ * If set PLL2_DEFAULT_FREQ one of 'starfive_pll2_freq_value', then PLL2
+ * frequency will be set the new rate during clock tree registering.
+ */
+#define PLL2_DEFAULT_FREQ      PLL2_FREQ_12288_VALUE
 
 #define PLL0_INDEX             0
 #define PLL1_INDEX             1