[AMDGPU] Check if register is non-null before calling isSubRegisterEq (NFCI)
authorSergei Barannikov <barannikov88@gmail.com>
Wed, 24 May 2023 05:10:35 +0000 (08:10 +0300)
committerSergei Barannikov <barannikov88@gmail.com>
Wed, 24 May 2023 07:32:07 +0000 (10:32 +0300)
D151036 adds an assertions that prohibits iterating over sub- and
super-registers of a null register. This is already the case when
iterating over register units of a null register, and worked by
accident for sub- and super-registers.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D151289

llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

index 3e45d33..7d97a07 100644 (file)
@@ -565,7 +565,7 @@ Register SIFrameLowering::getEntryFunctionReservedScratchRsrcReg(
     // reserved input we needed. Also for PAL, make sure we don't clobber
     // the GIT pointer passed in SGPR0 or SGPR8.
     if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) &&
-        !TRI->isSubRegisterEq(Reg, GITPtrLoReg)) {
+        (!GITPtrLoReg || !TRI->isSubRegisterEq(Reg, GITPtrLoReg))) {
       MRI.replaceRegWith(ScratchRsrcReg, Reg);
       MFI->setScratchRSrcReg(Reg);
       return Reg;