ASoC: rt5682: Add a new property for the DMIC clock driving
authorOder Chiou <oder_chiou@realtek.com>
Fri, 13 Nov 2020 05:53:59 +0000 (13:53 +0800)
committerMark Brown <broonie@kernel.org>
Fri, 13 Nov 2020 14:22:09 +0000 (14:22 +0000)
The patch adds a new property to set the DMIC clock driving.

Signed-off-by: Oder Chiou <oder_chiou@realtek.com>
Link: https://lore.kernel.org/r/20201113055400.11242-1-oder_chiou@realtek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
include/sound/rt5682.h
sound/soc/codecs/rt5682-i2c.c
sound/soc/codecs/rt5682.c
sound/soc/codecs/rt5682.h

index e1f7905..3900a07 100644 (file)
@@ -40,6 +40,7 @@ struct rt5682_platform_data {
        unsigned int btndet_delay;
        unsigned int dmic_clk_rate;
        unsigned int dmic_delay;
+       bool dmic_clk_driving_high;
 
        const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
 };
index 6b4e0eb..37d1312 100644 (file)
@@ -221,6 +221,11 @@ static int rt5682_i2c_probe(struct i2c_client *i2c,
                case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */
                        regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
                                RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK);
+                       if (rt5682->pdata.dmic_clk_driving_high)
+                               regmap_update_bits(rt5682->regmap,
+                                       RT5682_PAD_DRIVING_CTRL,
+                                       RT5682_PAD_DRV_GP3_MASK,
+                                       2 << RT5682_PAD_DRV_GP3_SFT);
                        break;
 
                default:
index a9acce7..f299b30 100644 (file)
@@ -2989,6 +2989,9 @@ int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev)
                         rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX],
                         rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]);
 
+       rt5682->pdata.dmic_clk_driving_high = device_property_read_bool(dev,
+               "realtek,dmic-clk-driving-high");
+
        return 0;
 }
 EXPORT_SYMBOL_GPL(rt5682_parse_dt);
index 354acd7..99b85cf 100644 (file)
 #define RT5682_CP_CLK_HP_300KHZ                        (0x2 << 4)
 #define RT5682_CP_CLK_HP_600KHZ                        (0x3 << 4)
 
+/* Pad Driving Control (0x0136) */
+#define RT5682_PAD_DRV_GP1_MASK                        (0x3 << 14)
+#define RT5682_PAD_DRV_GP1_SFT                 14
+#define RT5682_PAD_DRV_GP2_MASK                        (0x3 << 12)
+#define RT5682_PAD_DRV_GP2_SFT                 12
+#define RT5682_PAD_DRV_GP3_MASK                        (0x3 << 10)
+#define RT5682_PAD_DRV_GP3_SFT                 10
+#define RT5682_PAD_DRV_GP4_MASK                        (0x3 << 8)
+#define RT5682_PAD_DRV_GP4_SFT                 8
+#define RT5682_PAD_DRV_GP5_MASK                        (0x3 << 6)
+#define RT5682_PAD_DRV_GP5_SFT                 6
+#define RT5682_PAD_DRV_GP6_MASK                        (0x3 << 4)
+#define RT5682_PAD_DRV_GP6_SFT                 4
+
 /* Chopper and Clock control for DAC (0x013a)*/
 #define RT5682_CKXEN_DAC1_MASK                 (0x1 << 13)
 #define RT5682_CKXEN_DAC1_SFT                  13