drm/i915: Drop posting reads to flush master interrupts

We do not need to do a posting read of our uncached mmio write to
re-enable the master interrupt lines after handling an interrupt, so
don't. This saves us a slow UC read before we can process the interrupt,
most noticeable in execlists where any stalls imposes extra latency on
GPU command execution.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Ville Syrjala <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180628201211.13837-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4be56ae..02fe0d3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2183,7 +2183,6 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 
                I915_WRITE(VLV_IER, ier);
                I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
-               POSTING_READ(VLV_MASTER_IER);
 
                if (gt_iir)
                        snb_gt_irq_handler(dev_priv, gt_iir);
@@ -2268,7 +2267,6 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 
                I915_WRITE(VLV_IER, ier);
                I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
-               POSTING_READ(GEN8_MASTER_IRQ);
 
                gen8_gt_irq_handler(dev_priv, master_ctl, gt_iir);
 
@@ -2637,7 +2635,6 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
        /* disable master interrupt before clearing iir  */
        de_ier = I915_READ(DEIER);
        I915_WRITE(DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL);
-       POSTING_READ(DEIER);
 
        /* Disable south interrupts. We'll only write to SDEIIR once, so further
         * interrupts will will be stored on its back queue, and then we'll be
@@ -2647,7 +2644,6 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
        if (!HAS_PCH_NOP(dev_priv)) {
                sde_ier = I915_READ(SDEIER);
                I915_WRITE(SDEIER, 0);
-               POSTING_READ(SDEIER);
        }
 
        /* Find, clear, then process each source of interrupt */
@@ -2682,11 +2678,8 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
        }
 
        I915_WRITE(DEIER, de_ier);
-       POSTING_READ(DEIER);
-       if (!HAS_PCH_NOP(dev_priv)) {
+       if (!HAS_PCH_NOP(dev_priv))
                I915_WRITE(SDEIER, sde_ier);
-               POSTING_READ(SDEIER);
-       }
 
        /* IRQs are synced during runtime_suspend, we don't require a wakeref */
        enable_rpm_wakeref_asserts(dev_priv);