net: mvpp2x: Enable GoP packet padding in TX
authorStefan Chulski <stefanc@marvell.com>
Wed, 9 Aug 2017 07:37:45 +0000 (10:37 +0300)
committerStefan Roese <sr@denx.de>
Thu, 10 Aug 2017 06:33:02 +0000 (08:33 +0200)
This patch enables padding of packets shorter than 64B in TX(set by default).
Disabling of padding causes crashes on MACCIATO board.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
drivers/net/mvpp2.c

index 1264f14..3083111 100644 (file)
@@ -3063,10 +3063,6 @@ static void gop_gmac_sgmii2_5_cfg(struct mvpp2_port *port)
        val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK;
        writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
 
-       val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
-       val |= MVPP2_GMAC_PORT_DIS_PADING_MASK;
-       writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
-
        val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
        /*
         * Configure GIG MAC to 1000Base-X mode connected to a fiber
@@ -3109,10 +3105,6 @@ static void gop_gmac_sgmii_cfg(struct mvpp2_port *port)
        val |= MVPP2_GMAC_CTRL4_QSGMII_BYPASS_ACTIVE_MASK;
        writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
 
-       val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
-       val |= MVPP2_GMAC_PORT_DIS_PADING_MASK;
-       writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
-
        val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
        /* configure GIG MAC to SGMII mode */
        val &= ~MVPP2_GMAC_PORT_TYPE_MASK;
@@ -3151,10 +3143,6 @@ static void gop_gmac_rgmii_cfg(struct mvpp2_port *port)
        val |= MVPP2_GMAC_CTRL4_EXT_PIN_GMII_SEL_MASK;
        writel(val, port->base + MVPP2_GMAC_CTRL_4_REG);
 
-       val = readl(port->base + MVPP2_GMAC_CTRL_2_REG);
-       val &= ~MVPP2_GMAC_PORT_DIS_PADING_MASK;
-       writel(val, port->base + MVPP2_GMAC_CTRL_2_REG);
-
        val = readl(port->base + MVPP2_GMAC_CTRL_0_REG);
        /* configure GIG MAC to SGMII mode */
        val &= ~MVPP2_GMAC_PORT_TYPE_MASK;