The first SoC in the SpacemiT series is K1, which contains 8 RISC-V
cores with RISC-V Vector v1.0 support.
Link: https://www.spacemit.com/en/spacemit-key-stone-2/
Signed-off-by: Yangyu Chen <cyy@cyyself.name>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Yixun Lan <dlan@gentoo.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Matthias Brugger <matthias.bgg@kernel.org>
[ m.wilczynski: ported from
https://lore.kernel.org/all/
20240730-k1-01-basic-dt-v5-0-
98263aae83be@gentoo.org/
]
Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com>
Change-Id: I1c5bfca97a10b65dd2ee32839108db4e7948321c
help
This enables support for SiFive SoC platform hardware.
+config ARCH_SPACEMIT
+ bool "SpacemiT SoCs"
+ help
+ This enables support for SpacemiT SoC platform hardware.
+
config ARCH_STARFIVE
def_bool SOC_STARFIVE