[Hexagon] Fix disassembler crash after r279255

When p0 was added as an explicit operand to the duplex subinstructions,
the disassembler was not updated to reflect this.

llvm-svn: 281104

diff --git a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
index 7bc08ec..e020351 100644 (file)
--- a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
+++ b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
@@ -1501,6 +1501,9 @@ void HexagonDisassembler::addSubinstOperands(MCInst *MI, unsigned opcode,
     operand = getRegFromSubinstEncoding(inst & 0xf);
     Op = MCOperand::createReg(operand);
     MI->addOperand(Op);
+    if (opcode == Hexagon::V4_SA1_setin1)
+      break;
+    MI->addOperand(MCOperand::createReg(Hexagon::P0));
     break;
   case Hexagon::V4_SA1_cmpeqi:
     // Rs 7-4, u 1-0

diff --git a/llvm/test/MC/Hexagon/dis-duplex-p0.s b/llvm/test/MC/Hexagon/dis-duplex-p0.s
new file mode 100644 (file)
index 0000000..dc6a126
--- /dev/null
+++ b/llvm/test/MC/Hexagon/dis-duplex-p0.s
@@ -0,0 +1,7 @@
+// RUN: llvm-mc -arch=hexagon -filetype=obj -o - %s | llvm-objdump -d - | FileCheck %s
+// REQUIRES: asserts
+  .text
+// CHECK: { r7 = #-1; r7 = #-1 }
+  .long 0x3a373a27
+// CHECK: { if (!p0.new) r7 = #0; if (p0.new) r7 = #0 }
+  .long 0x3a573a47